Features and Benefits

  • Power-Down Mode Featuring Low CMOS Standby Power Dissipation with 200 CLKIN Cycle Recovery from Power-Down Condition
  • 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle
  • Multifunction Instructions
  • 12.5 ns Instruction Cycle Time @1.8 V (Internal), 80 MIPS Sustained Performance
  • Single-Cycle Instruction Execution
  • Single-Cycle Context Switch
  • Low Power Dissipation in Idle Mode
  • See datasheet for additional features

Product Details

The ADSP-218xN series consists of six single chip microcomputers optimized for digital signal processing applications. All series members are pin-compatible and are differentiated solely by the amount of on-chip SRAM. This feature combined with ADSP-21xx code compatibility provide a great deal of flexibility in the design decision. Specifically, the series members are -

  • ADSP-2184N (4K PM/4K DM)
  • ADSP-2186N (8K PM/8K DM)
  • ADSP-2185N (16K PM/16K DM)
  • ADSP-2187N (32K PM/32K DM)
  • ADSP-2189N (32K PM/48K DM)
  • ADSP-2188N (48K PM/56K DM)

The ADSP-218xN series offers the highest performance (80Mhz/MIPS) and lowest power consumption (0.55mW/MIP @ 1.8V) within the ADSP-218x portfolio. All series members are offered in a 100-lead LQFP and 144-Ball MBGA packages.

Product Lifecycle icon-not-recommended Not Recommended for New Designs

This designates products ADI does not recommend broadly for new designs.

Evaluation Kits (1)


Application Notes (62)

Software & Systems Requirements

Tools & Simulations

IBIS Models

ADSP-218xN IBIS Datafile (LQFP Package). Version 2.1 (Rev. 2.0)

[IBIS Ver]2.1, [File Rev]2.0, [Date] 11/05/01

Design Resources

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PCN-PDN Information

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