ADSP-21062

NOT RECOMMENDED FOR NEW DESIGNS

SHARC, 40 MHz, 120 MFLOPS, 5v, Floating Point

Data Sheet (Rev. H) Product Selection Table

Viewing:

Part Details

40MHz (25ns instruction rate) SISD SHARC Core
120MFLOPs peak performance
Code compatible with all SHARC processors
Supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math
2Mbits of on-chip dual-ported SRAM
Host Processor Interface

Six Link Ports for point to point connectivity and array multiprocessing
Two synchronous serial ports with independent transmit and receive functions
10 Channel DMA controller
Glueless connection for scalable DSP multiprocessing

Documentation

Data Sheet 1

ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC: SHARC Processor Data Sheet (Rev.H) 03/24/2008
- Documentation Errata

Application Note 39

EE-109: ADSP2106x : Using 2106x SPORT's as Timers 09/17/2002

EE-166: ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0 09/26/2002
- EE-166 Software Code

EE-62: Accessing Short Word Memory In C 09/16/2002

EE-70: ADSP-2106x SPORT DTx pins: Is There Potential MCM Data Contention Between Different SHARCs 09/17/2002

EE-47: ADSP-2106x Link Ports - Maximum Throughput 09/16/2002

EE-110: A Quick Primer on ELF and DWARF File Formats 05/17/2000

EE-332: Cycle Counting and Profiling (Rev.2) 08/18/2009
- EE-332: Code example

EE-160: Examining ADSP-21160 Link Port Backward Compatibility to the ADSP-2106x Link Ports 09/18/2002
- EE-160 Software Code

EE-128: DSP in C++: Calling Assembly Class Member Functions From C++ 09/18/2002

EE-305: Designing and Debugging Systems with SHARC Processors (Rev.1) 11/15/2006

EE-42: C-Programs on the ADSP-2106x 09/16/2002

EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14) 05/21/2007
- EE-175: Associated Files

EE-84: External Port DMA Modes of Operation for SHARC Processors (Rev.2) 03/02/2007
- EE-84: Code Example (Rev 2, 2/2007)

EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1) 08/31/2007

EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev.2) 09/17/2002
- EE-69: Code Example (Rev 2, 01/2007)

EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev.3) 09/15/2004
- EE-202 Software Code

EE-45: Using the ADSP-2106x/21020 EZ-ICE DBWIN Utility 09/16/2002

EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1) 02/15/2005

EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev.3) 03/07/2007

EE-132: Placing C Code and Data Modules in SHARC memory using VisualDSP++™ 09/18/2002
- EE-132 Software Code

EE-253: Power Bypass Decoupling of SHARC® Processors (Rev.1) 12/05/2006

EE-46: SHARC Internal Power Measurements 09/16/2002

EE-103: Performing Level Conversion Between 5v and 3.3v IC's 11/04/1999

EE-85: Recommended Handling of Unused SHARC Pins 09/17/2002

EE-116: SHARC Shortword DMA 09/18/2002
- EE-116 Software Code

EE-104: Setting Up Streams with the VisualDSP Debugger 11/05/1999
- EE-104 Software Code

EE-241: SHARC® DSPs to TigerSHARC® Processors Code Porting Guide (Rev.1) 07/19/2004
- EE-241 Software Code

EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs 05/21/2003
- EE-191 Software Code

EE-280: In-Circuit Flash Programming on ADSP-2106x SHARC® Processors (Rev.2) 04/10/2007
- EE-280: Code Example (Rev 2, 03/2007)

EE-323: Implementing Dynamically Loaded Software Modules (Rev.1) 03/08/2008
- EE-323: Associated Code

EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev.1) 07/27/2007

EE-37: How to Interface an LCD to the 21xx and 2106x Family DSP's 09/21/1997

EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev.1) 04/04/2005
- EE-267 Software Code

EE-86: Interfacing SHARC 2106x DSPs to PLX 9080 PCI Bridge Chips 09/17/2002

EE-141: Benchmarking C Code on the ADSP-2106x and the ADSP-2116x Family of DSPs 12/16/2002

EE-74: Analog Devices Serial Port Development and Troubleshooting Guide 11/04/1999

EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10) 12/20/2002

EE-112: Class Implementation in Analog C++ 11/14/2016

EE-340: Connecting SHARC^® and Blackfin^® Processors over SPI (Rev.1) 05/08/2009
- EE-340: Code example

Processor Manual 3

ADSP-2106x SHARC^® User's Manual (Rev.2.1) 03/07/2008
- Documentation Errata

SHARC Processors: Manuals 09/10/2015

Getting Started with SHARC 02/14/2015

Integrated Circuit Anomaly 1

ADSP-21062/ADSP-21062L SHARC Anomaly List for Revisions 2.0, 2.1, 3.0 (Rev.A) 10/26/2002

Legacy Emulator Manual 2

Apex-ICE USB Emulator Hardware Installation Guide (Rev.6.0) 03/08/2008

Summit-ICE PCI Emulator Hardware Installation Guide (Rev.4) 03/08/2008

This is the most up-to-date revision of the Data Sheet.

Software Resources

Software & Tools Anomaly 1

Software and Tools Anomalies Search

Tools & Simulations

BSDL Model File 2

Designing with BGA

Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages

IBIS Model 2

Latest Discussions

View related discussion on EngineerZone®

Recently Viewed