Features and Benefits

  • 50MHz (20ns instruction rate) SISD SHARC Core
  • 150MFLOPs peak performance
  • Code compatible with all SHARC processors
  • Supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math
  • 1Mbit of on-chip dual-ported SRAM
  • Glueless connection for scalable DSP multiprocessing
  • Two synchronous serial ports with independent transmit and receive functions
  • 6 Channel DMA controller
  • Host Processor Interface

Product Details

The ADSP-21061 is a member of the powerful SHARC® family of floating point processors. The SHARC® ­Super Harvard Architecture Computer­are signal processing microcomputers that offer new capabilities and levels of integration and performance.

The ADSP-21061 is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061 combines the ADSP-21000 DSP core with a dual-ported on-chip SRAM and an I/O processor with a dedicated I/O bus to form a complete system-in-a-chip.

Fabricated in a high-speed, low-power CMOS process, the ADSP-21061 has a 20 ns instruction cycle time operating at 50 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.

The ADSP-21061 SHARC® combines a high-performance floating-point DSP core with integrated, on-chip system features, including a 1 Mbit SRAM memory, host processor interface, DMA controller, serial ports and parallel bus connectivity for glueless DSP multiprocessing.

Product Lifecycle icon-recommended Production

At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.

Documentation & Resources

  • View All (47)
  • Data Sheets (1)
  • Application Notes (40)
  • User Guides (1)
  • Processor Manuals (2)
  • Integrated Circuit Anomalies (1)
  • Legacy Emulator Manuals (2)
  • Application Notes

    Software & Systems Requirements

    Software & Tools Anomalies

    Tools & Simulations

    IBIS Models

    ADSP-21061 IBIS Datafile (QFP Package)

    [IBIS Ver]2.1,[File Rev]1.1,[Date]12/02/98

    Design Resources

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    PCN-PDN Information

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