ADRV9026
Info : RECOMMENDED FOR NEW DESIGNS
searchIcon
cartIcon

ADRV9026

Integrated, Quad RF Transceiver with Observation Path

Show More showmore-icon

Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Part Models 2
1ku List Price Starting From $885.96
Features
  • 4 differential transmitters
  • 4 differential receivers
  • 2 observation receivers with 2 inputs each
  • Center frequency: 75 MHz to 6000 MHz
  • Maximum receiver bandwidth: 200 MHz
  • Maximum transmitter large signal bandwidth: 200 MHz
  • Maximum transmitter synthesis bandwidth: 450 MHz
  • Maximum observation receiver bandwidth: 450 MHz
  • Fully integrated independent fractional-N radio frequency synthesizers
  • Fully integrated clock synthesizer
  • Multichip phase synchronization for all local oscillators and baseband clocks
  • Support for TDD and FDD applications
  • 24.33 Gbps JESD204B/JESD204C digital interface
Additional Details
show more Icon

The ADRV9026 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.

The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.

The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) that provide an array of digital control options are also integrated.

To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.

A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9026 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.

The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.

The ADRV9026 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9026 is packaged in a 14 mm × 14 mm, 289-ball chip scale ball grid array (CSP_BGA).

Applications

  • 3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

Getting Started

Please visit the ADRV9026 landing page to download the Design File Package and the Software Package. The Design File Package includes the eval board schematics, BOM, layout, IBIS, BSDL models, JCOM models, Material Declaration, and Symbols and Footprints. The Software Package includes the GUI software, the API source code, the firmware, and the gain tables.

Part Models 2
1ku List Price Starting From $885.96

close icon
Documentation

Documentation

Video

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
ADRV9026BBCZ
  • HTML
  • HTML
ADRV9026BBCZ-REEL
  • HTML
  • HTML

Filter by Model

reset

Reset Filters

Part Models

Product Lifecycle

PCN

Nov 30, 2020

- 20_0305

Minor Silicon and Package Laminate Changes to ADRV9026

Filter by Model

reset

Reset Filters

Part Models

Product Lifecycle

PCN

Nov 30, 2020

- 20_0305

arrow down

Minor Silicon and Package Laminate Changes to ADRV9026

Software & Part Ecosystem

Software & Part Ecosystem

 
ADRV9026/ADRV9029 - SDCARD
Info:False

The ADRV9026-SDCARD included with the evaluation kit was up to date at the time of packaging the kit. If an update is necessary, the user will be prompted to update the image when connecting to the GUI. If the card does not function properly or users would like to create their own SD card, this image file can be downloaded and used to write a new card or overwrite the ADRV9026-SDCARD included with the evaluation kit. To program a card using this image, follow the programming instructions after downloading the image to a local drive. Note that a 16 GB minimum SD card is required when programming a new card.

 
ADRV9026 Released Software SW6.4.0.19
Info:False

The ADRV9026 software package contains the GUI software, the API source code, the firmware file, and the gain tables. The GUI software enables transceiver testing using the evaluation board and the Windows GUI. The API source code is intended for use in a customer system and can be integrated with the rest of the customer code and compiled for the target system. The firmware file in binary format is used by the ARM® processor on the transceivers. The gain tables include the receiver gain tables and transmitter attenuation table. Note that the files within the zip must be used together. For example, the ARM files from one zip file cannot be used with the API files from another version.

 
ADRV9026/ADRV9029 Release Build Software Release Notes SW6.4.0.19
Info:False

The SW6.4.0.19 RELEASE build provides updates in the ARM firmware, stream files, API, and GUI software to support ADRV9026/ADRV9029.

Evaluation Kit

Evaluation Kits 2

reference details image

EVAL-ADRV9026/ADRV9029

ADRV9026 and ADRV9029 Evaluation Board

zoom

EVAL-ADRV9026/ADRV9029

ADRV9026 and ADRV9029 Evaluation Board

ADRV9026 and ADRV9029 Evaluation Board

Features and Benefits

  • Complete ADRV9026 radio cards for evaluation
    • ADRV9026-HB/PCBZ for frequency band 2.8GHz to 6GHz
    • ADRV9026-MB/PCBZ for frequency band 650MHz to 2.8GHz
    • ADRV9026-LB/PCBZ for frequency band 75MHz to 1000MHz
  • Complete ADRV9029 radio cards for evaluation
    • ADRV9029-HB/PCBZ (integrated DPD & CFR) for frequency band 2.8GHz to 6GHz
    • ADRV9029-MB/PCBZ (integrated DPD & CFR) for frequency band 650MHz to 2.8GHz
  • 4x4 Wideband RF transceiver platform operating over 650MHz to 6GHz frequency range
  • A separate power daughter card provides reference design for high efficiency power supply solution
  • FMC connector to FPGA motherboard ADS9-V2EBZ
  • Includes schematics, layout, BOM, API and evaluation software

Product Detail

The ADRV9029 and ADRV9026 radio cards designed to showcase the ADRV9026 (quad-channel wideband RF transceiver) and ADRV9029 (quad-channel wideband RF transceiver with integrated DPD & CFR). The radio cards provide a 4x4 transceiver platform for device evaluation. All peripherals necessary for the radio card to operate include a separate high efficiency power circuit board, and a high-performance clocking solution included on the radio board. Connecting one of the radio cards with the FPGA motherboard ADS9-V2EBZ through the FMC connector form a complete evaluation platform for ADRV9026 and ADRV9029. The ADRV9026 evaluation kit can also be used to evaluate the performance of the ADRV9010.

reference details image

ADS9-V2EBZ

ADS9-V2EBZ Evaluation Board

zoom

ADS9-V2EBZ

ADS9-V2EBZ Evaluation Board

ADS9-V2EBZ Evaluation Board

Features and Benefits

Xilinx Kintex Ultrascale+ XCKU15P-2FFVE1517E FPGA.

  • One (1) FMC+ connector.
  • Twenty (20) 28Gbps transceivers supported by one (1) FMC+ connector.
  • HMC DRAM
  • Simple USB 3.0 port interface.
  • Two micro SD cards are included, "TRX" -- for ADRV9026 evaluation boards and "HSX" -- for MxFE evaluation boards.

Product Detail

When connected to a specified Analog Devices high speed converter evaluation board, the ADS9-V2EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS9-V2EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.
Tools & Simulations

Tools & Simulations 2

Recently Viewed