ADGS5412

RECOMMENDED FOR NEW DESIGNS

SPI Interface, 4× SPST Switches, 9.8 Ω RON, ±20 V/+36 V, Mux Configurable

Viewing:

Overview

  • SPI interface with error detection
    • Includes CRC, invalid read/write address, and SCLK count error detection
    • Supports burst mode and daisy-chain mode
    • Industry standard SPI Mode 0 and Mode 3 interface compatible
  • Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations
  • VSS to VDD analog signal range
    • Fully specified at ±15 V, ±20 V, +12 V, and +36 V
    • ±9 V to ±22 V dual-supply operation
    • 9 V to 40 V single-supply operation
  • Latch-up proof analog switch pins
  • 8 kV HBM ESD rating
  • Low on resistance (<10 Ω)
  • 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V

The ADGS5412 contains four independent single-pole/single- throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features, including cyclic redundancy check (CRC) error detection, invalid read/write address detection, and serial clock (SCLK) count error detection.

It is possible to daisy-chain multiple ADGS5412 devices together, which enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS5412 can also operate in burst mode to decrease the time between SPI commands.

Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.

The on-resistance profile is very flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals. The ADGS5412 exhibits break-before- make switching action, allowing use of the device in multiplexer applications with external wiring.

PRODUCT HIGHLIGHTS

  1. SPI interface removes the need for parallel conversion and logic traces and reduces general-purpose input/output (GPIO) channel count.
  2. Daisy-chain mode removes additional logic traces when multiple devices are used.
  3. CRC, invalid read/write address, and SCLK count error detection ensure a robust digital interface.
  4. CRC error detection capabilities allow for the use of the ADGS5412 in safety critical systems.
  5. Guaranteed break-before-make switching allows the use of the ADGS5412 in multiplexer configurations with external wiring.

Trench isolation analog switch section guards against latch-up. A dielectric trench separates the positive (P) and negative (N) channel transistors thereby preventing latch-up even under severe overvoltage conditions.

APPLICATIONS

  • Relay replacement
  • Automatic test equipment
  • Data acquisition
  • Instrumentation
  • Avionics
  • Audio and video switching
  • Communication systems

ADGS5412

SPI Interface, 4× SPST Switches, 9.8 Ω RON, ±20 V/+36 V, Mux Configurable

ADGS5412 Functional Block Diagram ADGS5412 Pin Configuration
Add to myAnalog

Add product to the Products section of myAnalog (to receive notifications), to an existing project or to a new project.

Create New Project
Ask a Question

Documentation

Learn More
Add to myAnalog

Add media to the Resources section of myAnalog, to an existing project or to a new project.

Create New Project

Software Resources


Tools & Simulations

LTspice


Models for the following parts are available in LTspice:

  • ADGS5412

SPICE Model 1

IBIS Model 1

LTspice

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.


Evaluation Kits

eval board
EVAL-ADGS5412

Evaluation Board for the ADGS5412 Serially Controlled, High Voltage, Latch-Up Proof, Quad SPST Switch

Features and Benefits

  • SPI interface with error detection
  • Includes CRC, invalid read/write address, and SCLK count error detection
  • Analog supply voltages
  • Dual-supply: ±9 V to ±22 V
  • Single-supply: 9 V to 40 V
  • PC control in conjunction with the evaluation software EVAL-SDP-CB1Z SDP

Product Details

The EVAL-ADGS5412SDZ is the evaluation board for the ADGS5412. The ADGS5412 is a latch-up proof, quad single-pole, single-throw (SPST) switch controlled by a serial peripheral interface (SPI). The SPI has robust error detection features, including cyclic redundancy check (CRC) error detection, invalid read/write address detection, and serial clock (SCLK) count error detection. It is possible to daisy-chain multiple ADGS5412 devices together. This enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS5412 also supports burst mode that decreases the time between SPI commands.

eval board
EVAL-24LFCSPEBZ

Evaluation Board for the 24-Lead LFCSP Devices in the Switches and Multiplexers Portfolio

Features and Benefits

  • 24-lead, 4 mm × 4 mm LFCSP evaluation board
  • Easily changeable socket for the main device
  • Gold pin connectors for the addition of passive components
  • SMB connectors for the input and output of signals
  • Additional space on board for prototyping

Product Details

The EVAL-24LFCSPEBZ enables easy evaluation of the 24-lead lead frame chip scale package (LFCSP) devices in the Switches and Multiplexers Portfolio portfolio that are purchased separately. The EVAL-24LFCSPEBZ is supplied with a socket to secure a 24-lead LFCSP device to the evaluation board without the need for soldering. In addition, there are three sets of gold pin connectors in each trace, allowing board flexibility and reusability for multiple evaluations.

Figure 1 shows the EVAL-24LFCSPEBZ. A 24-lead LFCSP device can be inserted into the socket in the center of the evaluation board. Each device pin has a corresponding 3-pin header link, from K1 to K24, that can either be connected to an external signal source by removing the corresponding link or by using the link to choose between VDD or GND. A wire screw terminal, J1, supplies the VDD and GND. The Subminiature Version B (SMB) connectors on the EVAL-24LFCSPEBZ allow additional external signals to be supplied to the device. In addition, there is a perfboard space and two 24-lead LFCSP pads (4 mm × 4 mm) available on top of the EVAL-24LFCSPEBZ for prototyping.

The full specifications of the device under test (DUT) are available in the corresponding product data sheet, which must be consulted with the EVAL-24LFCSPEBZ user guide when using the EVAL-24LFCSPEBZ.

EVAL-ADGS5412
Evaluation Board for the ADGS5412 Serially Controlled, High Voltage, Latch-Up Proof, Quad SPST Switch
EVAL-ADGS5412SDZ Image
EVAL-24LFCSPEBZ
Evaluation Board for the 24-Lead LFCSP Devices in the Switches and Multiplexers Portfolio
EVAL-24LFCSPEBZ Board Photo Angle View EVAL-24LFCSPEBZ Board Photo Top View EVAL-24LFCSPEBZ Board Photo Bottom View

Latest Discussions

Recently Viewed