Features and Benefits
- SPI interface with error detection
- Includes CRC, invalid read/write address, and SCLK count error detection
- Supports burst mode and daisy-chain mode
- Industry-standard SPI Mode 0 and SPI Mode 3 compatible
- Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations
- VSS to VDD analog signal range
- Fully specified at ±15 V and +12 V supply
- ±4.5 V to ±16.5 V dual-supply operation
- 5 V to 16.5 V single-supply operation
- Ultralow capacitance and leakage allows fast settling time
- 1 pF typical off switch drain capacitance at 25°C, ±15 V
- 2.6 pF typical on switch capacitance at 25°C, ±15 V
- <1 pC typical charge injection at 25°C
- 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
The ADGS1212 contains four independent single-pole/single-throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features such as cyclic redundancy check (CRC) error detection, invalid read/write address detection, and SCLK count error detection.
It is possible to daisy-chain multiple ADGS1212 devices together. Daisy-chain mode enables the configuration of multiple devices with minimal digital lines. The ADGS1212 can also operate in burst mode to decrease the time between SPI commands.
iCMOS construction ensures ultralow power dissipation, making the device ideal for portable and battery-powered instruments.
Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-andhold applications where low glitch and fast settling are required.
Fast switching speed coupled with high signal bandwidth make the device suitable for video signal switching.
Multifunction pin names may be referenced by their relevant function only.
- SPI interface removes the need for parallel conversion, logic traces, and reduces the general-purpose input/output (GPIO) channel count.
- Daisy-chain mode removes additional logic traces when multiple devices are used.
- CRC error detection, invalid read/write address detection, and SCLK count error detection ensure a robust digital interface.
- CRC and error detection capabilities allow the ADGS1212 to be used in safety critical systems.
- Guaranteed break-before-make switching allows the the ADGS1212 to be used in multiplexer configurations with external wiring.
- The ADGS1212 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
- Ultralow capacitance.
- <1 pC charge injection.
- Automated test equipment
- Data acquisition systems
- Battery-powered systems
- Sample-and-hold systems
- Audio signal routing
- Video signal routing
- Communications systems
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
The EVAL-ADGS1212SDZ is the evaluation board for the ADGS1212. The ADGS1212 is a low QIN, low CON, quad single-pole, single throw (SPST) switch controlled by a serial peripheral interface (SPI). The SPI has robust error detection features, including cyclic redundancy check (CRC) error detection, invalid read or write address detection, and serial clock (SCLK) count error detection. It is possible to daisy-chain multiple ADGS1212 devices together to enable the configuration of multiple devices with a minimal amount of digital lines. The ADGS1212 also supports burst mode that decreases the time between SPI commands.
The EVAL-ADGS1212SDZ is controlled by the EVAL-SDP-CB1Z system demonstration platform (SDP), which connects to a PC via a USB port. The ADGS1212 is on the center of the evaluation board and wire screw terminals are provided to connect to each of the source and drain pins. Three screw terminals power the device and, if required, a fourth terminal provides users with a defined digital logic supply voltage. Alternatively, the digital logic supply voltage can be supplied from the SDP.
Full specifications of the ADGS1212 can be found in the ADGS1212 data sheet available from Analog Devices, Inc., and should be consulted in conjunction with the user guide (UG-1184) when using the evaluation board.
The evaluation board interfaces to the USB port of a PC via the SDP board..
Tools & Simulations
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Sample & Buy
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