ADCLK948
Two Selectable Inputs, 8 LVPECL Outputs SiGe Clock Fanout Buffer
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Features
- 2 selectable differential inputs
- 4.8 GHz operating frequency
- 75 fs rms broadband random jitter
- On-chip input terminations
- 3.3 V power supply
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The ADCLK948 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.
The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFx pin is available for biasing ac-coupled inputs.
The ADCLK948 features eight full-swing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply.
The output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC -2V for a total differential output swing of 1.6V.
The ADCLK948 is available in a 32-lead LFCSP and specified for operation over the standard industrial temperature range of −40°C to +85°C.
APPLICATIONS
- Low jitter clock distribution
- Clock and data signal restoration
- Level translation
- Wireless communications
- Wired communications
- Medical and industrial imaging
- ATE and high performance instrumentation
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ADCLK948
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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADCLK948BCPZ |
32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP)
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| ADCLK948BCPZ-REEL7 |
32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP)
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- ADCLK948BCPZ
- Pin/Package Drawing
-
32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP)
- Documentation
-
HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
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SamacSys
- ADCLK948BCPZ-REEL7
- Pin/Package Drawing
-
32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
Filter by Model
Part Models
Product Lifecycle
PCN
Dec 3, 2015
- 15_0255
ADCLK9xx die change
ADCLK948BCPZ
PRODUCTION
ADCLK948BCPZ-REEL7
PRODUCTION
Nov 10, 2014
- 14_0047
Conversion of 5x5mm body Size LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to Amkor Philippines.
ADCLK948BCPZ
PRODUCTION
ADCLK948BCPZ-REEL7
PRODUCTION
Filter by Model
Part Models
Product Lifecycle
PCN
Dec 3, 2015
- 15_0255
ADCLK9xx die change
Nov 10, 2014
- 14_0047
Conversion of 5x5mm body Size LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to Amkor Philippines.
ADCLK948BCPZ
PRODUCTION
ADCLK948BCPZ-REEL7
PRODUCTION
Software & Part Ecosystem
Evaluation Kits 1
EVAL-ADCLK948
ADCLK948 Evaluation Board
Product Detail
The ADCLK948 is a very high performance clock fanout buffer. The evaluation board is fabricated using a high quality Rogers dielectric material. Transmission line paths are kept as close to 50 Ω as possible.
Resources
Evaluation Kits1
Tools & Simulations 2
IBIS Model 1
IBIS Model
ADIsimCLK Design and Evaluation Software
Reference Designs 1
CN0294
Increasing the Number of Outputs from a Clock Source Using Low Jitter LVPECL Fanout Buffers
Circuits from the lab
Info:Circuits from the lab
