Features and Benefits
- High speed
- −3 dB bandwidth: 195 MHz, GDIFF = +16 V/V, RL, DIFF = 40 Ω
- Differential slew rate: 2100 V/μs
- Wide output swing: 18.0 V p-p differential, 12 V supply
- High output current: 225 mA peak
- G.hn MTPR at 16 dBm line power
- −64 dBc typical at 5 MHz, referred to −58 dBm/Hz
- −64 dBc typical at 17 MHz, referred to −58 dBm/Hz
- −64 dBc typical at 28 MHz, referred to −58 dBm/Hz
- −63 dBc typical at 31 MHz, referred to −58 dBm/Hz
- −61 dBc typical at 59 MHz, referred to −58 dBm/Hz
- −62 dBc typical at 82 MHz, referred to −58 dBm/Hz
- CMOS-compatible SD pin
- Shutdown quiescent current: 3 mA
- ZOUT in shutdown: 10 kΩ differential (open-loop)
- Resistor adjustable quiescent current
The ADA4312-1 is a high speed, differential, current feedback line driver designed for half-duplex G.hn power line communication (PLC) modems. The high output current, high bandwidth, and slew rate of 2100 V/μs make the ADA4312-1 an excellent choice for G.hn broadband applications that require high linearity while driving low impedance loads.
The CMOS-compatible shutdown control pin (SD) reduces the quiescent current to 3 mA while maintaining an output impedance of 10 kΩ differential. The ADA4312-1 also provides resistor adjustable quiescent current for improved efficiency in transmit mode.
The ADA4312-1 is available in a thermally enhanced, 16-lead LFCSP with an exposed pad to facilitate robust thermal management. The ADA4312-1 is rated to operate over the extended industrial temperature range of −40°C to +85°C.Applications
- ITU G.hn (ITU G.9960/G.9961)
- HomePlug AV
- HomePlug AV2
- IEEE 1901
Product Lifecycle Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (1)
As is the case with many high speed line driver applications, careful attention to printed circuit board (PCB) layout can improve performance and help maintain stability while preventing excessive die temperatures during normal operation. Differential signal balance can be maintained by using symmetry in the PCB layout of input and output signal traces. See AN-772 for complete details.
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