AD9600

PRODUCTION

10-Bit, 105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter

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Overview

  • SNR = 60.6 dBc (61.6 dBFS) to 70 MHz at 150 MSPS
  • SFDR = 81 dBc to 70 MHz at 150 MSPS
  • Low power: 825 mW at 150 MSPS
  • 1.8 V analog supply operation
  • Integer 1 to 8 input clock divider
  • 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS supply
  • Intermediate frequency (IF) sampling frequencies up to 450 MHz
  • See datasheet for additional features

The AD9600 is a dual, 10-bit, 105 MSPS/125 MSPS/150 MSPS ADC. It is designed to support communications applications where low cost, small size, and versatility are desired.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

The AD9600 has several functions that simplify the automated gain control (AGC) function in a communications receiver. For example, the fast detect feature allows fast overrange detection by outputting four bits of input level information with very short latency.

In addition, the programmable threshold detector allows monitoring the amplitude of the incoming signal with short latency, using the four fast detect bits of the ADC. If the input signal level exceeds the programmable threshold, the fine upper threshold indicator goes high. Because this threshold is set from the four MSBs, the user can quickly adjust the system gain to avoid an overrange condition.

Another AGC-related function of the AD9600 is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system.

The ADC output data can be routed directly to the two external 10-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or 1.8 V LVDS. In addition, flexible power-down options allow significant power savings.

Product Highlights

  • Integrated dual, 10-bit, 150 MSPS/125 MSPS/105 MSPS ADC.
  • Fast overrange detect and signal monitor with serial output.
  • Signal monitor block with dedicated serial output mode.
  • Proprietary differential input maintains excellent SNR performance for input frequencies up to 450 MHz.
  • The AD9600 operates from a single 1.8 V supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.
  • A standard serial port interface supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down mode, and voltage reference mode.
  • The AD9600 is pin compatible with the AD9627-11, AD9627, and AD9640, allowing a simple migration from 10 bits to 11 bits, 12 bits, or 14 bits.

Applications

  • Point-to-point radio receivers (GPSK, QAM)
  • Diversity radio systems
  • I/Q demodulation systems
  • Smart antenna systems
  • Digital predistortion
  • General-purpose software radios
  • Broadband data applications
  • Data acquisition
  • Nondestructive testing

AD9600
10-Bit, 105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter
AD9600 Functional Block Diagram AD9600 Pin Configuration AD9600 Pin Configuration
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Tools & Simulations

Virtual Eval - BETA

Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.

Open Tool

AD9600 IBIS Models 2


Evaluation Kits

eval board
HSC-ADC-EVALCZ

FPGA-Based Data Capture Kit

Features and Benefits

  • 64kB FIFO Depth
  • Works with single and multi-channel ADCs
  • Use with VisualAnalog® software
  • Based on Virtex-4 FPGA
  • May require adaptor to interface with some ADC eval boards
  • Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
  • DDR Encode Rates on each channel

Product Details

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

EVAL-AD9600

AD9600 Evaluation Board

Product Details

This page contains evaluation board documentation and ordering information for evaluating the AD9600.

HSC-ADC-EVALCZ
FPGA-Based Data Capture Kit
High_Speed_ADC_evalboard_05
EVAL-AD9600
AD9600 Evaluation Board

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