AD9516-5

RECOMMENDED FOR NEW DESIGNS

14-Output Clock Generator

Part Models
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Part Details

  • Four 800 MHz LVDS outputs, arranged in 2 groups
    Each group has 2 cascaded 1-to-32 dividers with coarse phase delay
    Additive output jitter: 275 fs rms
    Fine delay adjust (Δt) on each LVDS output
    Each LVDS output can be reconfigured as two 250 MHz CMOS outputs 
  • Six 1.6 GHz LVPECL outputs, arranged in 3 groups
    Each group shares a 1-to-32 divider with coarse phase delay
    Additive output jitter: 225 fs rms
    Channel-to-channel skew paired outputs of <10 ps
  • See datasheet for additional features
AD9516-5
14-Output Clock Generator
AD9516-5 Functional Block Diagram AD9516-5 Pin Configuration
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Documentation

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Software Resources


Hardware Ecosystem

Parts Product Life Cycle Description
High Speed Comparators (<100ns Propagation Delay) 1
LTC6957 Low Phase Noise, Dual Output Buffer/Driver/Logic Converter
Integer-N PLL 1
ADF4002 RECOMMENDED FOR NEW DESIGNS Phase Detector / PLL Frequency Synthesizer
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Tools & Simulations


Evaluation Kits

EVAL-AD9516-5

AD9516-5 Evaluation Board

Features and Benefits

  • Simple power connection using 6 V wall adapter and on-board LDO voltage regulators
  • LDOs are easily bypassed for power measurements
  • 8 ac-coupled differential LVPECL SMA connectors
  • 2 ac-coupled LVPECL differential headers
  • 2 dc-coupled differential LVDS SMA connectors that are reconfigurable to four CMOS SMA connectors
  • 2 dc-coupled LVDS differential headers that are reconfigurable to four CMOS connectors
  • SMA connectors for
    • 2 reference inputs
    • Charge pump output
    • Clock distribution input
  • USB connection to PC
  • Microsoft Windows-based evaluation software with simple graphical user interface
  • On-board PLL loop filter
  • Easy access to digital I/O and diagnostic signals via I/O header
  • Status LEDs for diagnostic signals

Product Details

The AD9516-x, AD9517-x, and AD9518-x are very low noise PLL clock synthesizers featuring an integrated VCO, clock dividers, and up to 14 outputs. The AD9516 features automatic holdover and a flexible reference input circuit allowing for very smooth reference clock switching. The AD9516 family also features the necessary provisions for an external VCXO.

The AD9516 evaluation board is a compact, easy-to-use platform for evaluating all features of the AD9516. The user guide covers all six versions of the AD9516 family, as well as the AD9517 and AD9518 families (hereafter referred to as AD951x). The AD9516, AD9517, and AD9518 differ only in package size, and the number of outputs. The evaluation software main window for the AD9517 and AD9518 reflects fewer outputs, but the operation is identical for all devices.

Although the Quick Start Guide to the AD9516 PLL section applies specifically to the AD9516-3, increasing the N (feed-back) divider and channel divider increases the VCO frequency to the allowable frequency range of other AD9516 versions.

For the AD9516-5, which lacks an internal VCO, certain portions of this document that apply to the internal VCO (such as VCO calibration) can be ignored.

Applications

  • Clocking of analog-to-digital and digital-to-analog converters up to 2.9 GHz
  • Networking and communications line cards
  • Test and measurement equipment
  • Wireless base stations, controllers
  • Clock cleanup/jitter attenuation
  • Clock distribution

Resources

Software

EVAL-AD9516-5
AD9516-5 Evaluation Board

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