AD9430

PRODUCTION

12-Bit, 170/210 MSPS 3.3 V A/D Converter

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Overview

  • SNR = 65 dB @ fIN up to 70 MHz @ 210 MSPS
  • ENOB of 10.6 @ fIN up to 70 MHz @ 210 MSPS
  • Excellent Linearity:
    DNL = ±0.3 LSB (Typical)
    INL = ±0.5 LSB (Typical)
  • Two Output Data Options:
    Demultiplexed 3.3 V CMOS Outputs Each @ 105 MSPS
    Interleaved or Parallel Data Output Option
    LVDS at 210 MSPS
  • SFDR = 80 dBc @ fIN up to 70 MHz @ 210 MSPS
  • 700 MHz Full Power Analog Bandwidth
  • Power Dissipation = 1.3 W Typical @ 210 MSPS
  • 1.5 V Input Voltage Range
  • 3.3 V Supply Operation
  • Output Data Format Option
  • Data Sync Input and Data Clock Output Provided
  • Clock Duty Cycle Stabilizer

The AD9430 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates up to a 210 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and reference are included on the chip to provide a complete conversion solution.

The ADC requires a 3.3 V power supply and a differential ENCODE clock for full performance operation. The digital outputs are TTL/CMOS or LVDS compatible and support either twos complement or offset binary format. Separate output power supply pins support interfacing with 3.3 V or 2.5 V CMOS logic.

Two output buses support demultiplexed data up to 105 MSPS rates in CMOS mode. A data sync input is supported for proper output data port alignment in CMOS mode and a data clock output is available for proper output data timing. In LVDS mode, the chip provides data at the ENCODE clock rate.

Fabricated on an advanced BiCMOS process, the AD9430 is available in a 100-lead surface-mount plastic package (100 e-PAD TQFP) specified over the industrial temperature range (-40°C to +85°C).

APPLICATIONS

  • Wireless and Wired Broadband Communications
  • Cable Reverse Path
  • Communications Test Equipment
  • Radar and Satellite Subsystems
  • Power Amplifier Linearization

PRODUCT HIGHLIGHTS

  1. High performance. Maintains 65 dB SNR @ 210 MSPS with a 65 MHz input.
  2. Low power. Consumes only 1.3 W @ 210 MSPS.
  3. Ease of use. LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample-and-hold provide flexibility in system design. Use of a single 3.3 V supply simplifies system power supply design.
  4. Out of range (OR) feature. The OR output bit indicates when the input signal is beyond the selected input range.
  5. Pin compatible with 10-bit AD9411 (LVDS only).

AD9430
12-Bit, 170/210 MSPS 3.3 V A/D Converter
AD9430 Functional Block Diagram AD9430 Pin Configuration AD9430 Pin Configuration
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Documentation

Data Sheet 1

User Guide 1

Application Note 15

Technical Articles 5

Evaluation Design File 2

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Tools & Simulations

Virtual Eval - BETA

Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.

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ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

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Visual Analog

For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.

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AD9430 IBIS Models 1

AD9430 Simulink ADIsimADC Model

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