AD9230
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AD9230

12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter

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Info: : PRODUCTION tooltip
Info: : PRODUCTION tooltip
Part Details
Part Models 3
1ku List Price Starting From $46.84
Features
  • SNR = 64.9 dBFS @ fIN up to 70 MHz @ 250 MSPS
  • ENOB of 10.4 @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS)
  • SFDR = −79 dBc @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS)
  • Excellent linearity
    DNL = ±0.3 LSB typical
    INL = ±0.5 LSB typical
  • 700 MHz full power analog bandwidth
  • On-chip reference, no external decoupling required
  • Integrated input buffer and track-and-hold
  • Low power dissipation
    434 mW @ 250 MSPS—LVDS SDR mode
    400 mW @ 250 MSPS—LVDS DDR mode
  • Programmable input voltage range 1.0 V to 1.5 V, 1.25 V nominal
  • 1.8 V analog and digital supply operation
  • LVDS output with selectable data format
    (offset binary, twos complement, Gray code)
  • 11-bit version available: AD923011BCPZ-200
Additional Details
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The AD9230 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates at up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution. The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.

Fabricated on an advanced CMOS process, the AD9230 is available in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C).

PRODUCT HIGHLIGHTS

  1. High Performance—Maintains 64.9 dBFS SNR @ 250 MSPS with a 70 MHz input.
  2. Low Power—Consumes only 434 mW @ 250 MSPS.
  3. Ease of Use—LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample and hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design.
  4. Serial Port Control—Standard serial port interface supports various product functions, such as data formatting, disabling the clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation.
  5. Pin-Compatible Family—10-bit pin-compatible family offered as AD9211.

APPLICATIONS

  • Wireless and wired broadband communications
  • Cable reverse path
  • Communications test equipment
  • Radar and satellite subsystems
  • Power amplifier linearization
Part Models 3
1ku List Price Starting From $46.84

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Documentation

Documentation

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
AD9230BCPZ-170
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AD9230BCPZ-210
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AD9230BCPZ-250
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Software & Part Ecosystem

Software & Part Ecosystem

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Evaluation Kit

Evaluation Kits 2

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EVAL-AD9230

AD9230 Evaluation Board

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EVAL-AD9230

AD9230 Evaluation Board

AD9230 Evaluation Board

Features and Benefits

  • Full featured evaluation board for the AD9230
  • SPI interface for setup and control
  • External, on-board oscillator, or AD9517 clocking option
  • Balun/transformer or amplifier input drive option
  • LDO regulator or switching power supply options
  • VisualAnalog® and SPI controller software interfaces

Product Detail

The AD9230-250EBZ is an evaluation board for the AD9230 single, 12-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations, It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device’s hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AAD9230.

The AD9230 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com

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HSC-ADC-EVALCZ

FPGA-Based Data Capture Kit

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HSC-ADC-EVALCZ

FPGA-Based Data Capture Kit

FPGA-Based Data Capture Kit

Features and Benefits

  • 64kB FIFO Depth
  • Works with single and multi-channel ADCs
  • Use with VisualAnalog® software
  • Based on Virtex-4 FPGA
  • May require adaptor to interface with some ADC eval boards
  • Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
  • DDR Encode Rates on each channel

Product Detail

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.
Tools & Simulations

Tools & Simulations 5

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