AD9222

NOT RECOMMENDED FOR NEW DESIGNS

Octal, 12-Bit, 40/50/65 MSPS Serial LVDS 1.8 V A/D Converter

Data Sheet (Rev. F) Product Selection Table

Part Models: 4
1ku List Price: Starting From $53.53

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Overview

8 ADCs integrated into 1 package
114 mW ADC power per channel at 65 MSPS
SNR = 70 dB (to Nyquist)
ENOB = 11.3 bits
SFDR = 80 dBc
Excellent linearity:
- DNL = ±0.3 LSB (typical),
- INL = ±0.4 LSB (typical)
Serial LVDS (ANSI-644, default)
Low power, reduced signal option (similar IEEE 1596.3)
Data and frame clock outputs

325 MHz full-power analog bandwidth
2 V p-p input voltage range
1.8 V supply operation
Serial port control
-Full-chip and individual-channel power-down modes
-Flexible bit orientation
-Built-in and custom digital test pattern generation
-Programmable clock and data alignment
-Programmable output resolution
-Standby mode

The AD9222 is an octal, 12-bit, 40/50/65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.

The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).

The AD9222 is available in an RoHS compliant, 64-lead LFCSP. It is specified over the industrial temperature range of -40°C to +85°C.

PRODUCT HIGHLIGHTS

Small Footprint. Eight ADCs are contained in a small, space-saving package.
Low power of 114 mW/channel at 65 MSPS.
Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 390 MHz and supports double data rate (DDR) operation.
User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements.
Pin-Compatible Family. This includes the AD9212 (10-bit) and AD9252 (14-bit).

APPLICATIONS

Medical imaging and nondestructive ultrasound
Portable ultrasound and digital beam-forming systems
Quadrature radio receivers
Diversity radio receivers
Tape drives
Optical networking
Test equipment

Part Models: 4
1ku List Price: Starting From $53.53

Documentation

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
AD9222ABCPZ-40	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9222ABCPZ-50	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9222ABCPZ-65	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9222ABCPZRL7-50	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys

Part Models	Product Lifecycle	PCN

Feb 1, 2024 - 24_0009 Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process
		PCN24_0009_Form Material_Report Qualification Results Summary
AD9222ABCPZ-40
AD9222ABCPZ-50
AD9222ABCPZ-65
AD9222ABCPZRL7-50	PRODUCTION
Jun 9, 2021 - 20_0126 Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
		PCN20_0126_Form Qualification Results Summary Material_Report Detailed Change Description Package Outline Drawing Package Outline Drawing Qualification Results Summary Qualification Results Summary Qualification Results Summary Qualification Results Summary
AD9222ABCPZ-40
AD9222ABCPZ-50
AD9222ABCPZ-65
AD9222ABCPZRL7-50	PRODUCTION

This is the most up-to-date revision of the Data Sheet.

Software Resources

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Tools & Simulations

Virtual Eval - BETA

Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.

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AD9222 Simulink ADIsimADC Model

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AD9222 IBIS Models 1

AD9222BCP (All Speeds)

Visual Analog

For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.

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Evaluation Kits

FPGA-Based Data Capture Kit

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Features and Benefits

64kB FIFO Depth
Works with single and multi-channel ADCs
Use with VisualAnalog^® software
Based on Virtex-4 FPGA
May require adaptor to interface with some ADC eval boards
Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
DDR Encode Rates on each channel

Product Details

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog^® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.