AD7111
NOT RECOMMENDED FOR NEW DESIGNSMonolithic Multiplying DAC Featuring Wide Dynamic Range
Part Details
- Dynamic Range: 88.5 dB
- Resolution: 0.375 dB
- On-Chip Data Latches
- +5 V Operation
- AD7111A Pin Compatible with AD7524
- Low Power
The LOGDAC™ AD7111 / AD7111A are monolithic multiplying D/A converters featuring wide dynamic range in a small package. Both DACs can attenuate an analog input signal over the range 0 dB to 88.5 dB in 0.375 dB steps. They are available in 16-pin DIPs and SOIC packages. The AD7111 is also available in a 20-terminal LCCC package.
The degree of attenuation across the DAC is determined by an 8-bit word applied to the on-board decode logic. This 8-bit word is decoded into a 17-bit word which is then applied to a 17-bit R-2R ladder. The very fine step resolution, which is available over the entire dynamic range, is due to the use of this 17-bit DAC.
The AD7111 / AD7111A are easily interfaced to a standard 8-bit MPU bus via an 8-bit data port and standard microprocessor control lines. The AD7111 WR input is edge triggered and requires a rising edge to load new data to the DAC. The AD7111A WR is level triggered to allow transparent operation of the latches, if required. It should also be noted that the AD7111A is exactly pin and function-compatible with the AD7524, an industry standard 8-bit multiplying DAC. This allows an easy upgrading of existing AD7524 designs which would benefit both from the wider dynamic range and the finer step resolution offered by the AD7111A.
The AD7111 / AD7111A are fabricated in Linear Compatible CMOS (LC2MOS), an advanced, mixed technology process that combines precision bipolar circuits with lower CMOS logic.
LOGDAC is a registered trademark of Analog Devices, Inc.
Documentation
Data Sheet 1
Application Note 2
Solutions Bulletin & Brochure 1
This is the most up-to-date revision of the Data Sheet.
Software Resources
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Precision DAC Error Budget Tool
The Precision DAC Error Budget Tool is a web application that calculates the DC Accuracy of precision DAC signal chains. It shows how the static errors accumulate throughout your signal chain to quickly evaluate the design tradeoffs. Calculations include the DC errors introduced by Voltage References, Operation Amplifiers and Precision DACs.
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