AD664: Monolithic 12-Bit Quad DAC Data Sheet (Rev. E)9/28/2006
AD664: Military Data Sheet1/1/2000
Features and Benefits
- Four Complete Voltage Output DACs
- Date Register Readbck Feature
- "Reset to Zero" Override
- Multiplying Operation
- Double-Buffered Latched
- Surface-mount (LCC, PLCC, and JLCC) and PDIP and SBDIP packages
- MIL-STD-883 Compliant Versions Available
The AD664 is four complete 12-bit, voltage-output digital-toanalog converters (DACs) on one monolithic IC chip. Each DAC has a double buffered input latch structure and a data readback function. All DAC read and write operations occur through a single microprocessor-compatible input/output (I/O) port.
The I/O port accommodates 4-bit, 8-bit, or 12-bit parallel words allowing simple interfacing with a wide variety of microprocessors. A reset to zero control pin is provided to allow a user to simultaneously reset all DAC outputs to zero, regardless of the contents of the input latch. Any one or all of the DACs may be placed in a transparent mode allowing immediate response by the outputs to the input data.
The analog portion of the AD664 consists of four DAC cells, four output amplifiers, a control amplifier, and switches. Each DAC cell is an inverting R-2R type. The output current from each DAC is switched to the on-board application resistors and output amplifier. The output range of each DAC cell is programmed through the digital input/output port and may be set to unipolar (UNI) or bipolar (BIP) range, with a gain of one or two times the reference voltage. All DACs are operated from a single external reference
The functional completeness of the AD664 results from the combination of the Analog Devices, Inc., BiMOS II process, laser trimmed thin film resistors, and double level metal interconnects.
Product Lifecycle Not Recommended for New Designs
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Documentation & Resources
Tools & Simulations
Precision DAC Error Budget Tool
The Precision DAC Error Budget Tool is a web application that calculates the DC Accuracy of precision DAC signal chains. It shows how the static errors accumulate throughout your signal chain to quickly evaluate the design tradeoffs. Calculations include the DC errors introduced by Voltage References, Operation Amplifiers and Precision DACs.
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