RHP51002

Name: RHP51002
Brand: Analog Devices
Availability: InStock

RECOMMENDED FOR NEW DESIGNS

500mA, Ultralow Noise, Ultrahigh PSRR Negative Linear Regulator for Commercial Space

Data Sheet (Rev. 0) Product Selection Table

Part Models: 2
1ku List Price: Starting From $75.00

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Overview

No Single-Event Latch-Up (SEL) up to79.9MeV × cm2/mg at V_IN ≤ 16V
Total Ionizing Dose (TID) Assured up to 30kRad
Ultralow Root Mean Square (RMS) Noise: 0.8μVRMS(10Hz to 100kHz)
Ultralow Spot Noise: 2.2nV/√Hz at 10kHz
Ultrahigh Power Supply Rejection Ratio (PSRR):74dB at 1MHz
Output Current: 500mA
Wide Input Voltage Range: –2.3V to –20V
A Single Capacitor Improves Noise and PSRR
100μA SET Pin Current: ±1% Initial Accuracy
Single Resistor Programs Output Voltage
Programmable Current Limit
Low Dropout Voltage: 235mV
Output Voltage Range: 0V to –19.5V
Programmable Power Good and Fast Start-Up

Bipolar Precision Enable/ Undervoltage Lockout(UVLO) Pin
Voltage Input-to-Output Control (VIOC) Pin ControlsUpstream Regulator to Minimize Power Dissipationand Optimize Power Supply Rejection Ratio (PSRR)
Minimum Output Capacitor: 10μF Ceramic Capacitor
12-Lead MSOP Package

Commercial Space Features

Supports Aerospace Applications
Wafer Diffusion Lot Traceability
Radiation Monitors

Single-Event Latch-Up (SEL)
Total Ionizing Dose (TID)

Outgassing Characterization
Nickel Palladium Gold (NiPdAu) Terminal Finish

Part Models: 2
1ku List Price: Starting From $75.00

Documentation

Data Sheet 1

RHP51002: 500mA, Ultralow Noise, Ultrahigh PSRR Negative Linear Regulator for Commercial Space Data Sheet (Rev.0) 10/20/2026

User Guide 1

EVAL-RHP51002 User Guide: Evaluates: RHP51002 (Rev.0) 10/20/2026

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
RHP51002IMSE-CSL#PBF	12-Lead MSOP w/ EP	Material Declaration Reliability Report Package Resources	Ultra Librarian SamacSys
RHP51002IMSE-CSL#TRPBF	12-Lead MSOP w/ EP	Material Declaration Reliability Report Package Resources	Ultra Librarian SamacSys

This is the most up-to-date revision of the Data Sheet.

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Evaluation Kits

Evaluates: RHP51002

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Product Details

The EVAL-RHP51002-CSLZ features the RHP51002, an ultralow noise, ultrahigh power supply rejection ratio (PSRR) negative low dropout (LDO) regulator. EVAL-RHP51002-CSLZ operates over an input range of –3.8V to –20V and can deliver up to 500mA output current. It features ultralow noise (0.8μV_RMS from 10Hz to 100kHz) and very high PSRR (75dB at 1MHz).

The RHP51002 enable function (EN/UVLO pin) is bidirectional and can be controlled with either a positive or a negative voltage. The RHP51002 also offers programmable current limit functionality by connecting a resistor from ILIM to GND. Current monitoring is also achieved by sensing the I_LIM pin voltage. The V_IOC tracking function controls an upstream switching converter to maintain a constant voltage across the regulator and, hence, minimize power dissipation. The power good feedback (PGFB) pin sets a programmable power good threshold and activates the fast start-up circuitry. To use the power good function, connect an external voltage source at V_EXT. If power good and fast start-up functionality are not needed, tie PGFB to IN.

Built-in protection includes reverse battery protection, reverse current protection, internal current limit with foldback, and thermal limit with hysteresis.

For a complete description of the RHP51002, including operating details and application information, refer to the RHP51002 data sheet. The data sheet must be read in conjunction with this valuation board user guide for EVAL-RHP51002-CSLZ. The RHP51002 is assembled in a 12-lead micro small outline Package (MSOP) and 3mm × 3mm dual flat no-lead (DFN) packages with an exposed pad on the bottom side of the device. Proper board layout is essential for maximum thermal performance.