LTC2206-14

PRODUCTION

14-Bit, 80Msps ADC

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Overview

  • Sample Rate: 105Msps/80Msps
  • 77.3dBFS Noise Floor
  • 98dB SFDR
  • SFDR >82dB at 250MHz (1.5VP-P Input Range)
  • PGA Front End (2.25VP-P or 1.5VP-P Input Range)
  • 700MHz Full Power Bandwidth S/H
  • Optional Internal Dither
  • Optional Data Output Randomizer
  • Single 3.3V Supply
  • Power Dissipation: 947mW/762mW
  • Optional Clock Duty Cycle Stabilizer
  • Out-of-Range Indicator
  • Pin-Compatible Family
    • 105Msps: LTC2207 (16-Bit), LTC2207-14 (14-Bit)
    • 80Msps: LTC2206 (16-Bit), LTC2206-14 (14-Bit)
    • 65Msps: LTC2205 (16-Bit), LTC2205-14 (14-Bit)
    • 40Msps: LTC2204 (16-Bit)
    • 25Msps: LTC2203 (16-Bit) Single-Ended Clock
    • 10Msps: LTC2202 (16-Bit) Single-Ended Clock
  • 48-Pin 7mm × 7mm QFN Package

The LTC2207-14/LTC2206-14 are 105Msps/80Msps, sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end.

The LTC2207-14/LTC2206-14 are perfect for demanding communications applications, with AC performance that includes 77.3dB SNR and 98dB spurious free dynamic range (SFDR). Ultralow jitter of 80fsRMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±1.5LSB INL, ±1LSB DNL (no missing codes) over temperature.

A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V.

The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.

Bits
LTC2206-14 14
LTC2206-16 16

Applications

  • Telecommunications
  • Receivers
  • Cellular Base Stations
  • Spectrum Analysis
  • Imaging Systems
  • ATE

LTC2206-14
14-Bit, 80Msps ADC
LTC2207-14: 32K Point FFT, fIN = 14.86MHz, –1dBFS, PGA = 0, 105Msps Product Package 1
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Documentation

Data Sheet 1

Reliability Data 1

User Guide 2

Data Sheet

This is the most up-to-date revision of the Data Sheet.

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Software Resources

Evaluation Software 2

PScope

The PScope System is a USB-based product demonstration and data acquisition system for use with high performance ADCs and signal chain receiver family. PScope allows users to evaluate the SNR, SFDR, THD, as well as other key parameters, quickly and easily.

LinearLab Tools

A collection of Matlab and Python programs that provide direct access to Linear Technology’s data converter evaluation boards.


Hardware Ecosystem

Parts Product Life Cycle Description
Differential Amplifiers 1
LTC6400-8 LAST TIME BUY 2.2GHz Low Noise, Low Distortion Differential ADC Driver for DC-300MHz
Phase-Locked Loop (PLL) Synthesizers 1
LTC6946 LAST TIME BUY Ultralow Noise and Spurious 0.37GHz to 6.39GHz Integer-N Synthesizer with Integrated VCO
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Tools & Simulations


Evaluation Kits

eval board
DC918C-J

LTC2206-14 | CMOS OUT, 80Msps, 14-Bit ADC, 1MHz < AIN < 70MHz (Requires DC718)

Product Details

DC918C-J: Demo Board for the LTC2206-14 14-Bit, 80Msps ADC.


 


eval board
DC919A-H

LTC2206-14 | CMOS OUT, DC INPUT, 80Msps 14-Bit ADC, DC < AIN < 70MHz (Requires DC718)

Product Details

DC919A-H: Demo Board for the LTC2206-14 14-Bit, 80Msps ADC.


 


eval board
DC918C-K

LTC2206-14 | CMOS OUT, 80Msps, 14-Bit ADC, 70MHz < AIN < 140MHz (Requires DC718)

Product Details

DC918C-K: Demo Board for the LTC2206-14 14-Bit, 80Msps ADC.


 


DC918C-J
LTC2206-14 | CMOS OUT, 80Msps, 14-Bit ADC, 1MHz < AIN < 70MHz (Requires DC718)
DC918C-A - Schematic
DC919A-H
LTC2206-14 | CMOS OUT, DC INPUT, 80Msps 14-Bit ADC, DC < AIN < 70MHz (Requires DC718)
DC919A-A - Schematic
DC918C-K
LTC2206-14 | CMOS OUT, 80Msps, 14-Bit ADC, 70MHz < AIN < 140MHz (Requires DC718)
DC918C-A - Schematic

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