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HMC905

RECOMMENDED FOR NEW DESIGNS

6 GHz Low Noise Programmable Divider (N = 1 to 4) SMT

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Overview

  • Low Noise Floor: -164 dBc/Hz at 10 MHz Offset for N = 4
  • Programmable Frequency
    Divider, N = 1, 2, 3 or 4
  • Input Frequency Range: 400 MHz to 6 GHz
  • Output Power up to +6 dBm
  • Sleep Mode: Consumes <1 μA
  • 16 Lead 3×3mm SMT Package: 9mm2

The HMC905LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3x3 mm leadless surface mount package. The circuit can be programmed to divide from N = 1 to N = 4 in the 400 MHz to 6 GHz input frequency range. The high level output power (up to 6 dBm single ended) with a very low SSB phase noise and 50% duty cycle makes this device ideal for low noise clock generation, LO generation and LO drive applications. Configurable bias and output power controls allow current consumption and output power control. The device incorporates a power down feature, good input to output isolation and fast start up time. The HMC905LP3E can be included into fast switching "ping-pong" applications.

APPLICATIONS

  • LO Generation with Low Noise Floor
  • Software Defined Radios
  • Clock Generators
  • Fast Switching Synthesizers
  • Military Applications 
  • Test Equipment
  • Sensors

HMC905
6 GHz Low Noise Programmable Divider (N = 1 to 4) SMT
HMC905 Functional Block Diagram
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Documentation

Data Sheet 1

Data Sheet

This is the most up-to-date revision of the Data Sheet.

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Evaluation Kits

eval board
EVAL-HMC905LP3E

HMC905LP3E Evaluation Board

Product Details

This page contains ordering information for evaluating the HMC905LP3E.

The design files link includes the BOM, schematics, and Gerber files for the evaluation board.

EVAL-HMC905LP3E
HMC905LP3E Evaluation Board
HMC905 Evaluation Board HMC905 Evaluation Board HMC905 Evaluation Board

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