ADRV9010
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ADRV9010

Integrated, Quad RF Transceiver with Observation Path

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Part Models 3
1ku List Price Starting From $1020.78
Features
  • 4 differential transmitters
  • 4 differential receivers
  • 2 observation receivers with 2 inputs each
  • Center frequency
    • 650 MHz to 3800 MHz (ADRV9010BBCZ)
    • 650 MHz to 6000 MHz (ADRV9010BBCZ-A)
  • Maximum receiver bandwidth: 200 MHz
  • Maximum transmitter bandwidth: 200 MHz
  • Maximum transmitter synthesis bandwidth: 450 MHz
  • Maximum observation receiver bandwidth: 450 MHz
  • Fully integrated independent fractional-N radio frequency synthesizers
  • Fully integrated clock synthesizer
  • Multichip phase synchronization for all local oscillators and baseband clocks
  • JESD204B/JESD204C digital interface
Additional Details
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The ADRV9010 is a highly integrated, radio frequency (RF) agile transceiver that offers four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions to provide a complete transceiver solution. The device provides the high radio performance and low power consumption demanded by cellular infrastructure applications such as TDD-based small cell base station radios, macro 3G/4G/5G TDD systems, and TDD based massive multiple in/multiple out (MIMO) base stations. The ADRV9010BBCZ operates from 650 MHz to 3800 MHz, covering most of the licensed and unlicensed cellular bands. The ADRV9010BBCZ-A operates from 650 MHz to 6000 MHz.

The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with state-of-the-art dynamic range. The four independent transmitters use an innovative direct conversion modulator that achieves high modulation accuracy with exceptionally low noise. The ADRV9010 device also includes two wide bandwidth, time shared observation path receivers with two inputs each for monitoring transmitter outputs.

The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) that provide an array of digital control options are also integrated.

To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide high performance, low power fractional-N RF synthesis for the transmitter and receiver signal paths. One fully integrated PLL also supports an independent local oscillator (LO) mode for the observation receiver. Another PLL generates the clocks needed for the converters and digital circuits and a fifth PLL provides the clock for the serial data interface. A multichip synchronization mechanism synchronizes the phases of all LOs and baseband clocks between multiple ADRV9010 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.

The serial data interface consists of eight serializer lanes and eight deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 16.22016 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.

The ADRV9010 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI). Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9010 is packaged in a 14 mm × 14 mm, 289-ball chip scale ball grid array (CSP_BGA).

APPLICATIONS

  • 3G/4G/5G TDD macro and small cell base stations
  • TDD active antenna systems for advanced LTE and 5G
Part Models 3
1ku List Price Starting From $1020.78

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Documentation

Documentation

Video

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
ADRV9010BBCZ
  • HTML
  • HTML
ADRV9010BBCZ-A
  • HTML
  • HTML
ADRV9010BBCZ-REEL
  • HTML
  • HTML
Software & Part Ecosystem

Software & Part Ecosystem

 

ADRV9010 Release Build Software Release Notes (PDF) SW4.1.0.84

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The SW4.1.0.84 release build provides ARM firmware, stream files, API, and GUI software to support the ADRV9010.

 

ADRV9010 Released Software SW4.1.0.84

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The ADRV9010 software package contains the GUI software, the API source code, the firmware file, and the gain tables. The GUI software enables transceiver testing using the evaluation board and the Windows GUI. The API source code is intended for use in a customer system and can be integrated with the rest of the customer code and compiled for the target system. The firmware file in binary format is used by the ARM® processor on the transceivers. The gain tables include the receiver gain tables and transmitter attenuation table. Note that the files within the zip must be used together. For example, the ARM files from one zip file cannot be used with the API files from another version.

Evaluation Kit

Evaluation Kits 2

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EVAL-ADRV9026/ADRV9029

ADRV9026 and ADRV9029 Evaluation Board

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EVAL-ADRV9026/ADRV9029

ADRV9026 and ADRV9029 Evaluation Board

ADRV9026 and ADRV9029 Evaluation Board

Features and Benefits

  • Complete ADRV9026 radio cards for evaluation
    • ADRV9026-HB/PCBZ for frequency band 2.8GHz to 6GHz
    • ADRV9026-MB/PCBZ for frequency band 650MHz to 2.8GHz
    • ADRV9026-LB/PCBZ for frequency band 75MHz to 1000MHz
  • Complete ADRV9029 radio cards for evaluation
    • ADRV9029-HB/PCBZ (integrated DPD & CFR) for frequency band 2.8GHz to 6GHz
    • ADRV9029-MB/PCBZ (integrated DPD & CFR) for frequency band 650MHz to 2.8GHz
  • 4x4 Wideband RF transceiver platform operating over 650MHz to 6GHz frequency range
  • A separate power daughter card provides reference design for high efficiency power supply solution
  • FMC connector to FPGA motherboard ADS9-V2EBZ
  • Includes schematics, layout, BOM, API and evaluation software

Product Detail

The ADRV9029 and ADRV9026 radio cards designed to showcase the ADRV9026 (quad-channel wideband RF transceiver) and ADRV9029 (quad-channel wideband RF transceiver with integrated DPD & CFR). The radio cards provide a 4x4 transceiver platform for device evaluation. All peripherals necessary for the radio card to operate include a separate high efficiency power circuit board, and a high-performance clocking solution included on the radio board. Connecting one of the radio cards with the FPGA motherboard ADS9-V2EBZ through the FMC connector form a complete evaluation platform for ADRV9026 and ADRV9029. The ADRV9026 evaluation kit can also be used to evaluate the performance of the ADRV9010.

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ADS9-V2EBZ

ADS9-V2EBZ Evaluation Board

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ADS9-V2EBZ

ADS9-V2EBZ Evaluation Board

ADS9-V2EBZ Evaluation Board

Features and Benefits

Xilinx Kintex Ultrascale+ XCKU15P-2FFVE1517E FPGA.

  • One (1) FMC+ connector.
  • Twenty (20) 28Gbps transceivers supported by one (1) FMC+ connector.
  • HMC DRAM
  • Simple USB 3.0 port interface.
  • Two micro SD cards are included, "TRX" -- for ADRV9026 evaluation boards and "HSX" -- for MxFE evaluation boards.

Product Detail

When connected to a specified Analog Devices high speed converter evaluation board, the ADS9-V2EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS9-V2EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.
Tools & Simulations

Tools & Simulations 2

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