Features and Benefits
- Simple power connection using USB connection and on-board LDO voltage regulators
- LDOs are easily bypassed for power measurements
- AC-coupled differential SMA connectors
- SMA connectors for
2 reference inputs
2 PLL status outputs
1 reference test input
2 VCXO interface inputs/outputs
- Microsoft Windows®–based evaluation software with simple graphical user interface
- On-board PLL loop filter
- Easy access to digital I/O and diagnostic signals via I/O header
- Status LEDs for diagnostic signals
- USB computer interface
- Software calculator provides flexibility, allowing programming of almost any rational input/output frequency ratio
Product DetailsThe AD9523 and AD9524 are designed to operate in the same manner.
The AD9523 is defined to support the clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive phase noise requirements necessary for acceptable data converter SNR performance.
The input receivers, oscillator, and zero delay receiver provide both single-ended and differential operation. When connected to a 30.72 MHz to 122.88 MHz reference clock and a VCXO of either 30.72 MHz to 122.88 MHz, the device generates low noise outputs from a range of 0.96 MHz to 983.04 MHz.