Digital Isolators: Solving Design Challenges in Automotive xEV Applications

Digital Isolators: Solving Design Challenges in Automotive xEV Applications



James Stegen

When developing solutions for automotive xEV applications, one of the challenges a designer will encounter is how to communicate digital data between the high voltage battery domain and low voltage battery domain electronics. This challenge occurs within applications such as battery cell voltage monitoring, battery current measurement, high voltage contactor monitoring, or motor control. A typical battery management system (BMS) application is shown in Figure 1, which highlights several areas where digital signal isolation is required. It will be used for the purpose of discussing the various design considerations.

Figure 1. Typical Configuration of a Battery Management System.

In the BMS application, the designer is faced with developing a solution that allows the communication of high speed digital signals from various integrated circuits across an isolation barrier. For the design example, these high speed digital signals are the serial peripheral interface (SPI) connection utilized for communication between the BMS controller and the battery cell monitoring electronics. The isolation barrier must provide protection for the BMS controller electronics, which operate within the typical automotive 12 V domain, from the electronics referenced to the high voltage (upwards of 500 V) battery domain. The isolation barrier must also provide robustness to the high voltage battery transients produced by the vehicles electric drive system. The isolation barrier and the isolation devices are of significant importance as they protect not only the vehicle electronics, but also the vehicle occupants from electric shock from the high voltage battery.

For the isolation barrier requirements, the designer can reference various industry standards to determine the proper guidelines for printed circuit board design. For the digital isolation device selection, the designer will be faced with various challenges and must consider several key performance parameters, such as device current consumption, PCB space constraints, data speed/data integrity (channel to channel matching), and proper isolation and working voltage (over full automotive lifetime). This article explores the device current consumption and PCB space constraint challenges.

With the two challenges outlined, the process of determining the appropriate component solution can be explored. To perform the digital isolation, there are various technologies available in the marketplace today, and the two under consideration for component selection are optocoupler-based isolation and digital-based isolation. Optocouplers operate by generating light via an LED, which passes through a clear isolation barrier to a photodetector, while a digital isolator is designed using a high speed CMOS process with embedded air core microtransformers.

The first design challenge under consideration is device current consumption, which presents the designer with two challenges. Quiescent current draw is a main focus in xEV electronic design as current draw in the vehicles off state leads to deviations in the high voltage battery packs last known state of charge. In addition, operating current consumption for electronic circuits is a pain point when summed across all the electronic modules supported within an electric vehicle. In both cases, the desire is to make each as small as possible. To solve the quiescent current draw, one can design the BMS to disable the source voltage supply to nonessential circuits, which removes this concern for the designer. However, for the required operating current on the isolation devices, there is a large delta between the digital isolators and optocouplers. Assuming a 1 MHz SPI interface for the battery cell monitoring application, a digital isolator such as the Analog Devices ADuM1401 would consume 2.4 mA of low voltage domain operating current and 1.4 mA of high voltage domain operating current for the four digital isolation channels required for the SPI communication bus. This value is valid for operating conditions covering the typical automotive 5 V supply range and over the extended automotive −40°C to +125°C operating temperate range. A matching solution based on optocouplers would require a minimum of 4 mA per isolation channel, however, the designer must account for variations in the 5 V supply voltage and operating temperature. Accounting for these variations increases the current draw per isolation channel to 10 mA resulting in 30 mA of operating current in the low voltage domain and 10 mA of operating current in the high voltage domain for the same SPI communication bus. Digital isolators such as the ADuM1401 show a clear advantage in operating current consumption over the traditional optocoupler solution.

The next challenge to be addressed is the mechanical design constraints placed on the BMS electronic design engineers.PCB area is a valuable commodity in BMS developments and designers are faced with creating solutions that must fit in very compact areas. The high voltage to low voltage interface spacing requirements (typically referred to as creepage and clearance) are defined by various electrical standards, and components must meet the minimum requirements identified by these standards for a given development. A comparison of the digital and optocoupler isolation solutions is examined to determine which implementation can save a significant amount of area on the PCB.

For the digital isolator solution, an examination of ADuM1401 follows. The ADuM1401 is implemented in a 16-lead SOIC_W package, which has a standard JEDEC package dimension of 10.3 mm × 10.3 mm, giving a total component area of 106 mm2. The comparable optocoupler solution requires four 5-lead SOIC packaged devices, which have a standard JEDEC package dimension of 7.0 mm × 3.6 mm, giving a single component area of 25.2 mm. Four components are required to be placed on the PCB, and a typical 1.2 mm component placement keep out is required between devices. Summing the total PCB area for the optocoupler solution, the designer must allow for 134.5 mm2. Already the designer can realize an approximate 28 mm2 area of savings with a digital isolator solution.

With the isolation device area defined, the designer turns next to the required supporting components for the complete solution. Digital isolators, such as the ADuM1401, require the use of two external bypass capacitors. Assuming 0603 packaged capacitors, the area consumed would be 2.5 mm2. For the typical optocoupler implementation, the designer must add four resistors (5.1 mm2), four capacitors (5.1 mm2), and four predrive circuits (33 mm2 as most microcontrollers cannot handle the 10 mA current requirements on their GPIO pins. The designer can see at this point that the digital isolator solution provides a clear advantage when PCB area is a design concern.

Another design consideration relating to PCB space involves powering the high voltage side of the isolation device. For BMS applications, equalized current consumption across the cell monitoring devices is desired to prevent an inherent imbalance in the battery cell stack.

For the optocoupler solution, a separate dc-to-dc converter is required to provide an isolated supply voltage to power the high voltage side interface, which increases the already larger PCB area required. Within the digital isolator family of devices, the designer can select the ADuM5401 digital isolator, which contains the four channels of isolation for the SPI interface and integrates the dc-to-dc converter function for powering the high voltage side interface. This is achieved in the same package dimension as the ADuM1401 digital isolator, so there is no additional PCB area penalty.

The digital isolator solution provides the designer with a space efficient isolation device implementation when compared to the traditional optocoupler approach as shown in Figure 2.

Figure 2. PCB Space Comparison.

In summary, the digital isolation challenges facing a design engineer of xEV electronics can be solved using several different isolation topologies. By utilizing digital isolators, the designer can realize significant savings in both current consumption and PCB area in their applications. For more information, visit