| Title |
Content Type |
File Type |
|
AD9911: 500 MSPS Direct Digital Synthesizer with 10-Bit DAC Data Sheet (Rev 0, 05/2006) (pdf, 937 kB)
|
Data Sheets |
PDF
|
|
AN-953: Direct Digital Synthesis (DDS) with a Programmable Modulus
(pdf, 112 kB)
|
Application Notes |
PDF
|
|
AN-939: Super-Nyquist Operation of the AD9912 Yields a High RF Output Signal
(pdf, 221 kB)
|
Application Notes |
PDF
|
|
AN-927: Determining if a Spur is Related to the DDS/DAC or to Some Other Source (For Example, Switching Supplies)
(pdf, 170 kB)
|
Application Notes |
PDF
|
|
AN-843: Measuring a Loudspeaker Impedance Profile Using the AD5933 (Rev. A, 6/07)
(pdf, 284 kB)
|
Application Notes |
PDF
|
|
AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance
(pdf, 313 kB)
|
Application Notes |
PDF
|
|
AN-772: A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP)
(pdf, 439 kB)
|
Application Notes |
PDF
|
|
AN-769: Generating Multiple Clock Outputs from the AD9540
(pdf, 0)
|
Application Notes |
PDF
|
AN-823: Direct Digital Synthesizers in Clocking Applications Time
(pdf, 115 kB)
Jitter in Direct Digital Synthesizer-Based Clocking Systems
|
Application Notes |
PDF
|
|
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design
(pdf, 262 kB)
|
Application Notes |
PDF
|
|
AN-847: Measuring a Grounded Impedance Profile Using the AD5933
(pdf, 294 kB)
|
Application Notes |
PDF
|
AN-345: Grounding for Low-and-High-Frequency Circuits
(pdf, 455 kB)
Know Your Ground and Signal Paths for Effective Designs. Current Flow Seeks Path of Least Impedance-Not Just Resistance....
|
Application Notes |
PDF
|
|
AN-605: Synchronizing Multiple AD9852 DDS-Based Synthesizers
(pdf, 527 kB)
|
Application Notes |
PDF
|
|
AN-632: Provisionary Data Rates Using the AD9951 DDS as an Agile Reference Clock for the ADN2812 Continuous-Rate CDR
(pdf, 138 kB)
|
Application Notes |
PDF
|
AN-621: Programming the AD9832/AD9835
(pdf, 202 kB)
This application note details how to program 5 MHz on the output of the AD9832/AD9835 parts. The frequency
register,defer register,and command sequence are explained in detail.
|
Application Notes |
PDF
|
AN-342: Analog Signal-Handling for High Speed and Accuracy.
(pdf, 468 kB)
Signal handling techniques for optimizing DAC and ADC performance.
|
Application Notes |
PDF
|
AN-280: Mixed Signal Circuit Technologies
(pdf, 2101 kB)
Considers problems which arise when reality (& Murphy) intervene in a design which otherwise seems satisfactory in terms of theory and modeling.
|
Application Notes |
PDF
|
AN-557: An Experimenter's Project:
(pdf, 368 kB)
Incorporating the AD9850 Complete DDS Device as a Digital LO Function in an Amateur Radio Transceiver
|
Application Notes |
PDF
|
|
AN-419: A Discrete, Low Phase Noise, 125 MHz Crystal Oscillator for the AD9850
(pdf, 101 kB)
|
Application Notes |
PDF
|
|
AN-237: Choosing DACs for Direct Digital Synthesis
(pdf, 1156 kB)
|
Application Notes |
PDF
|
|
AN-423: Amplitude Modulation of the AD9850 Direct Digital Synthesizer
(pdf, 37 kB)
|
Application Notes |
PDF
|
|
AN-587: Synchronizing Multiple AD9850/AD9851 DDS-Based Synthesizers
(pdf, 116 kB)
|
Application Notes |
PDF
|
|
AN-543: High Quality, All-Digital RF Frequency Modulation Generation with the ADSP-2181 and the AD9850 DDS
(pdf, 49 kB)
|
Application Notes |
PDF
|
|
CN-0109: Low Jitter Sampling Clock Generator for High Performance ADCs Using the AD9958/AD9858 500 MSPS/1GSPS DDS and AD9515 Clock Distribution IC
(pdf, 114 kB)
|
Circuit Note |
PDF
|
A Technical Tutorial on Digital Signal Synthesis
(pdf, 901 kB)
Copyright © 1999 Analog Devices, Inc.
|
Design Handbooks |
PDF
|
Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
This month we conclude our two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs.
|
Webcasts |
WEBCAST
|
Performance Clocks: Demystifying Jitter
Join us as we delve into the realm of sub-picosecond jitter clocks. The relationship between jitter and phase noise will be explored in detail and methods for measuring sub-picosecond jitter and ultra low phase noise will be presented and discussed.
|
Webcasts |
WEBCAST
|
Speedy A/Ds Demand Stable Clocks
by Jeff Keip, Analog Devices, Inc. (EE Times, 3/18/04)
|
Technical Articles |
HTML
|
Improved DDS Devices Enable Advanced Comm Systems
by Valoree Young, Analog Devices
(Electronic Products, September 2006)
|
Technical Articles |
HTML
|
ADI Buys Korean Mobile TV Chip Maker
(EE Times, 6/7/2006)
|
Technical Articles |
HTML
|
DDS Device Provides Amplitude Modulation
by Mary McCarthy, Analog Devices, Inc.
(EDN, September 2, 1999)
|
Technical Articles |
HTML
|
Introducing Digital Up/Down Converters: VersaCOMM™ Reconfigurable Digital Converters
(pdf, 63 kB)
Revolutionize your radio architectures
|
Technical Articles |
PDF
|
|
Digital Up/Down Converters: VersaCOMM™ White Paper
(pdf, 97 kB)
|
Technical Articles |
PDF
|
|
Basics of Designing a Digital Radio Receiver (Radio 101)
(pdf, 77 kB)
|
Technical Articles |
PDF
|
Synchronized Synthesizers Aid Multichannel Systems
by David Brandon and John Kornblum, Analog Devices, Inc. (Microwaves & RF, 9/2005)
|
Technical Articles |
HTML
|
The Year of the Waveform Generator
(Test & Measurement World, 12/1/2005)
|
Technical Articles |
HTML
|
DDS Applications
by Eva Murphy and Colm Slattery, Analog Devices, Inc. (EETimes, 9/26/2005)
|
Technical Articles |
HTML
|
DDS IC Initiates Synchronized Signals
(Microwaves & RF Cover Story, July 2005)
|
Technical Articles |
HTML
|
Digital Waveform Generator Provides Flexible Frequency Tuning for Sensor Measurement
by Colm Slattery, Analog Devices (EDN, 12/17/2004)
|
Technical Articles |
HTML
|
DDS Simplifies Polar Modulation
By Ken Gentile, Analog Devices ... Basic modulation mathematics and DDS (direct digital synthesis) provide designers with an all-digital technique for generating polar-encoded carrier signals. (EDN, 8/5/2004)
|
Technical Articles |
HTML
|
Two DDS ICs Implement Amplitude-shift Keying
by Noel McNamara, Analog Devices, Inc. (EDN Design Idea, 12/25/2003)
|
Technical Articles |
HTML
|
DDS IC Plus Frequency-To-Voltage Converter Make Low-Cost DAC
by Noel McNamara, Analog Devices, Inc. (EDN Design Idea, 2/5/2004)
|
Technical Articles |
HTML
|
Integrated DDS Chip Takes Steps To 2.7 GHz
This highly integrated 2.7-GHz source includes all essential DDS circuitry along with a clock driver, divider, high-resolution DAC, and combination phase detector/charge pump. (ED Online, April 2004)
|
Technical Articles |
HTML
|
DDS Circuit Generates Precise PWM Waveforms
by Colm Slattery, Analog Devices, Inc. (EDN, 10/2/2003)
|
Technical Articles |
HTML
|
Simple Circuit Controls Stepper Motors
by Noel McNamara, Analog Devices, Inc. (EDN Design Idea, 1/8/04)
|
Technical Articles |
HTML
|
Digital Potentiometers Vary Amplitude In DDS Devices
(PDF)
(Electronic Design, Ideas for Design, 5/29/2000)
|
Technical Articles |
PDF
|
DDS Device Produces Sawtooth Waveform
Ramp or sawtooth waveforms are useful for a broad range of applications, including automatic-test equipment, benchtest equipment, and actuator control. (EDN Design Idea, 7/10/2003)
|
Technical Articles |
HTML
|
400-MSample DDSs Run On Only +1.8 VDC
... This line of highly integrated DDS ICs features on-board RAM and
crystal-oscillator circuitry to simplify the generation of agile and exotic waveforms. (Microwaves & RF Cover Story, 12/2002)
|
Technical Articles |
HTML
|
AD9858: Flexible Integrated Synthesizer For Wireless
(htm)
... The most important feature of the AD9858 is its ability to change frequency in less than 5 ns, meaning that there is virtually no application left where you will need to go the expense of switching between two separate synthesizers. (AnalogZone, RF/IF Zone Products for the Week of 9/23/2002)
|
Technical Articles |
HTM
|
DDS Tackles BaseStations Head On
... This High-Performance, Low-Power Integrated Hybrid Synthesizer Flaunts A 10-b Digital-To-Analog Converter
That Operates At Up To 1 GSample/s.
(Wireless Systems Design, September 2002)
|
Technical Articles |
HTML
|
Video Portables and Cameras Get HDMI Outputs
By Doug Bartow, Analog Devices, Inc.
|
Technical Articles |
HTML
|
Clock Requirements For Data Converters
(Electronic Design, 2/2005)
|
Technical Articles |
HTML
|
DDS Design
By David Brandon, Analog Devices, Inc.
Direct digital synthesizers are known for their highly accurate digital tuning, low noise figure, and phase-continuous frequency-hopping capabilities, which make them more attractive than alternative analog frequency-synthesis solutions.
(EDN, 5/13/2004)
|
Technical Articles |
HTML
|
Free Direct Digital Synthesis IC Evaluation Tool
(Control Engineering, 9/14/2006)
|
Product Reviews |
HTML
|
On-Line Evaluation Tool Simplifies Implementing DDS Semiconductors
(eeProductCenter, 8/16/2006)
|
Product Reviews |
HTML
|
RF Source Booklet
(pdf, 815 kB)
RF IC Product Overview - Version O (11/2012)
|
Overview |
PDF
|
|
My evaluation board is not working; the software is reporting a USB Communication Error. I verified that the evaluation board is connected to the PC and powered. What else can I check?
|
FAQs/RAQs |
HTML
|
|
Are there any specific recommendations for material in the vias of the circuit board for the thermally enhanced package styles in which some ADI DDS' are available?
|
FAQs/RAQs |
HTML
|
|
I have limited experience working with thermally enhanced packages. Where can I get information concerning the proper techniques for soldering and assembly?
|
FAQs/RAQs |
HTML
|
|
I need to operate my DDS part above the rated temperature range. Can you give me any reliability data?
|
FAQs/RAQs |
HTML
|
|
Are any of your DDS products space qualified?
|
FAQs/RAQs |
HTML
|
|
Why did the model numbers change on the AD9852 and AD9854 products? I thought they were available in the ASQ package.
|
FAQs/RAQs |
HTML
|
|
If the port has a differential REF CLK, and I want to use a single-ended clock, what do I do with the other differential input?
|
FAQs/RAQs |
HTML
|
|
If I violate the proper logic level of the REF CLK (that is, underdrive or overdrive it), what can I expect?
|
FAQs/RAQs |
HTML
|
|
What type of signal source is recommended?
|
FAQs/RAQs |
HTML
|
|
Why does spectral performance degrade when using larger values of multiplication on the clock multiplier?
|
FAQs/RAQs |
HTML
|
|
Can the DDS evaluation boards be integrated directly into a system project?
|
FAQs/RAQs |
HTML
|
|
I am having problems getting my evaluation software to see my evaluation board; what should I do to correct the problem?
|
FAQs/RAQs |
HTML
|
|
Is all DDS software supplied by Analog Devices compatible with all WinXX versions?
|
FAQs/RAQs |
HTML
|
|
What is the proper termination for the DAC outputs for the DDS products?
|
FAQs/RAQs |
HTML
|
|
Why can't I see a signal at the output of my DDS when it is unterminated? (I'm setting everything correctly, but I'm just probing the output pins of the DDS which have nothing connected to them.)
|
FAQs/RAQs |
HTML
|
|
How can I synchronize multiple DDS parts?
|
FAQs/RAQs |
HTML
|
|
Can I gate the REF CLK on and off?
|
FAQs/RAQs |
HTML
|
|
What kind of problems can I expect from exceeding the maximum clock rate? (power dissipation, spectral problems)
|
FAQs/RAQs |
HTML
|
|
What is the effect of REF CLK jitter on the DDS?
|
FAQs/RAQs |
HTML
|
|
What are the proper logic input levels for the DDS parts?
|
FAQs/RAQs |
HTML
|
|
What are the advantages and disadvantages of serial and parallel mode?
|
FAQs/RAQs |
HTML
|
|
Can I read back data at the same rate that I can write the data to the DDS device?
|
FAQs/RAQs |
HTML
|
|
What logic families can interface with our parts?
|
FAQs/RAQs |
HTML
|
|
What is the maximum speed I can write to the part?
|
FAQs/RAQs |
HTML
|
|
I would like to update the FTW of my DDS, but only a single byte of the FTW needs to change. Can the frequency tuning word of a DDS be partially updated a byte at a time?
|
FAQs/RAQs |
HTML
|
|
What layout recommendations do you have for the power supply pins of the DDS device?
|
FAQs/RAQs |
HTML
|
|
What is the effect of increasing my supply voltage beyond the nominal recommended value?
|
FAQs/RAQs |
HTML
|
|
I have limited power to supply to the part. What can I do to reduce the power consumption of the device and thus ensure that my supply is adequate?
|
FAQs/RAQs |
HTML
|
|
Do you recommend a linear or switching power supply?
|
FAQs/RAQs |
HTML
|
|
Should I separate digital and analog ground planes on my evaluation board?
|
FAQs/RAQs |
HTML
|
|
Can I use the same power supply for AVDD and DVDD?
|
FAQs/RAQs |
HTML
|
|
What is the ratio between the analog and digital currents drawn by the DDS devices?
|
FAQs/RAQs |
HTML
|
|
I'm not using all the blocks of the AD9858. What do I do with the unused inputs of these sections?
|
FAQs/RAQs |
HTML
|
|
What causes a Quadrature Digital Upconverter (AD9856, AD9857) to go into a CIC overflow condition?
|
FAQs/RAQs |
HTML
|
|
How do I use a DDS for a clock driver?
|
FAQs/RAQs |
HTML
|
|
How do I perform amplitude modulation on the output?
|
FAQs/RAQs |
HTML
|
|
How can I control the envelope of the output?
|
FAQs/RAQs |
HTML
|
|
How do I change the phase of my output signal?
|
FAQs/RAQs |
HTML
|
|
Are frequency changes of a DDS phase coherent?
|
FAQs/RAQs |
HTML
|
|
What type of frequency sweeping is available?
|
FAQs/RAQs |
HTML
|
|
What type of automatic frequency sweeping modes does each of your DDS parts support?
|
FAQs/RAQs |
HTML
|
|
Does Analog Devices offer a list of manufacturers of oscillators for DDS devices?
|
FAQs/RAQs |
HTML
|
|
Where can I find some good background material on direct digital synthesis?
|
FAQs/RAQs |
HTML
|
|
Do you have a DDS overview?
|
FAQs/RAQs |
HTML
|
|
RAQs index
|
Rarely Asked Questions |
HTML
|
|
Glossary of EE Terms
|
Glossary |
HTML |