The AD9775 is the 14-bit member of the AD977x pin-compatible, high performance, programmable 2×/4×/8× interpolating TxDAC+ family. The AD977x family features a serial port interface (SPI) that provides a high level of programmability, thus allowing for enhanced system-level options. These options include selectable 2×/4×/8× interpolation filters; fS/2, fS/4, or fS/8 digital quadrature modulation with image rejection; a direct IF mode; programmable channel gain and offset control; programmable internal clock divider; straight binary or twos complement data interface; and a single-port or dual-port data interface.
The selectable 2×/4×/8× interpolation filters simplify the requirements of the reconstruction filters while simultaneously enhancing the pass-band noise/distortion performance of TxDAC+ devices. The independent channel gain and offset adjust registers allow the user to calibrate LO feedthrough and sideband suppression errors associated with analog quadrature modulators. The 6 dB of gain adjustment range can also be used to control the output power level of each DAC.
The AD9775 can perform fS/2, fS/4, and fS/8 digital modulation and image rejection when combined with an analog quadrature modulator. In this mode, the AD9775 accepts I and Q complex data (representing a single or multicarrier waveform), generates a quadrature modulated IF signal along with its orthogonal representation via its dual DACs, and presents these two reconstructed orthogonal IF carriers to an analog quadrature modulator to complete the image rejection upconversion process. Another digital modulation mode (that is, the direct IF mode) allows the original baseband signal representation to be frequency translated such that pairs of images fall at multiples of one-half the DAC update rate.
The AD977x family includes a flexible clock interface that accepts differential or single-ended sine wave or digital logic inputs. An internal PLL clock multiplier is included and generates the necessary on-chip high frequency clocks. It can also be disabled to allow the use of a higher performance external clock source. An internal programmable divider simplifies clock generation in the converter when using an external clock source. A flexible data input interface allows for straight binary or twos complement formats and supports single-port interleaved or dual-port data.
Dual high performance DAC outputs provide a differential current output programmable over a 2 mA to 20 mA range.
The AD9775 is manufactured on an advanced 0.35 micron CMOS process, operates from a single supply of 3.1 V to 3.5 V, and consumes 1.2 W of power.
|Title||Content Type||File Type|
|AD9775: 14-Bit, 160 MSPS, 2/4/8 Interpolating Dual TxDAC+ ® D/A Converter Data Sheet (Rev E, 12/2006) (pdf, 1517 kB)||Data Sheets|
|AN-320A: CMOS Multiplying DACs and Op Amps Combine to Build Programmable Gain Amplifier, Part 1 (pdf, 1295 kB)||Application Notes|
|AN-642: Coupling a Single-Ended Clock Source to the Differential Clock Input of Third-Generation TxDAC® and TxDAC+® Products (pdf, 479 kB)||Application Notes|
|AN-237: Choosing DACs for Direct Digital Synthesis (pdf, 1156 kB)||Application Notes|
|AN-595: Understanding Pin Compatibility in the TxDAC® Line of High Speed D/A Converters (pdf, 36 kB)||Application Notes|
|Digital to Analog Converters ICs Solutions Bulletin (pdf)||Solutions Bulletins|
|RAQs index||Rarely Asked Questions||HTML|
|Glossary of EE Terms||Glossary||HTML|
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DAC Harmonic Analyzer
This tool displays harmonic images and spurs in a DAC output. The user can define a post-DAC analog filter to suppress these images. The effect of this filter is plotted on the graph and shown in the accompanying chart.
|DAC Harmonic Analyzer||HTML|
|AD9775 IBIS Models||IBIS Models||HTML|
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