The AD7790/AD7791 are low-power, complete analog front ends for low frequency measurement applications. The device consumes 65 µA of current typically when operated with a 3 V power supply and 75 µA typical when operated with a 5 V power supply with the buffer disabled. The AD7791 contains a 24-bit S-D ADC with one differential input, which can be buffered or unbuffered. The AD7790 is a 16-bit version of the AD7791. The AD7790 has a peak-to-peak resolution of 16 bits at the default output data rate of 16.6 Hz while the AD7789 has a peak to peak resolution of 19 bits, which is equivalent to an effective resolution of 21.5 bits at this output data rate.
The device operates from an internal clock. Therefore, the user does not have to supply a clock source to the device. The output data rate from the part is software programmable, allowing rates from 9.5 Hz to 120 Hz. The p-p resolution from the part varies with the programmed output data rate. With an output data rate of 16.6 Hz, simultaneous 50 Hz/60 Hz rejection is achieved. Power supply monitoring is also included.
The part can be used in single conversion mode whereby the device powers up, performs a single conversion and then returns to powerdown mode. Alternatively, it can be operated in continuous mode. In continuous conversion mode, the part can be configured to continuously read i.e. the conversions are placed on the serial bus automatically as soon as a conversion is complete (the user does not need to write to the ADC to read the data), assuming that the serial clock is applied to the device.
The AD7790/AD7791 is housed in a 10-lead MSOP package.
|Title||Content Type||File Type|
AD7790: Low Power, 16-Bit Buffered Sigma-Delta ADC Data Sheet (Rev A, 03/2013) (pdf, 299 kB)
|AN-968: Current Sources: Options and Circuits (pdf, 131 kB)||Application Notes|
|AN-311: How to Reliably Protect CMOS Circuits Against Power Supply Overvoltaging (pdf, 217 kB)||Application Notes|
|AN-607: Selecting a Low Bandwidth (<15 kSPS) Sigma-Delta ADC (pdf, 222 kB)||Application Notes|
AN-615: Peak-to-Peak Resolution Versus Effective Resolution
(pdf, 70 kB)
This application note describes effective resolution and peak-to-peak resolution and highlights the difference between these two specifications.
AN-397: Electrically Induced Damage to Standard Linear Integrated Circuits:
(pdf, 149 kB)
The Most Common Causes and the Associated Fixes to Prevent Reoccurrence
|AN-202: An IC Amplifier User’s Guide to Decoupling, Grounding, and Making Things Go Right for a Change (pdf, 76 kB)||Application Notes|
|CN-0271:K-Type Thermocouple Measurement System with Integrated Cold Junction Compensation (pdf, 565 kB)||Circuit Note|
|MS-2210: Designing Power Supplies for High Speed ADC (pdf, 327 kB)||Technical Articles|
Delta-Sigma Rocks RF, As ADC Designers Jump On Jitter
(Electronic Design, 1/12/06)
Circuit Provides ISFET-Sensor Bias
by Brian Harrington, Analog Devices, Inc. (EDN Design Idea, 6/10/2004)
|Sigma Delta ADCs (< 15 kSPS)||Product Selection Guide||HTML|
Flea-Power 24-Bit A/Ds Tout Microvolt Noise Levels
(ChipCenter Product Review)
|RAQs index||Rarely Asked Questions||HTML|
|FAQs for the AD779x family.||FAQs/RAQs||HTML|
|Glossary of EE Terms||Glossary||HTML|
|Title||Content Type||File Type|
Sigma-Delta ADC Tutorial
An interactive illustration showing the behavior of an idealized sigma-delta A/D converter.
|Utilities and Conversions||HTML|
Digital Filter Model Spreadsheets
These spreadsheet tools show the response of the digital filter section of the AD71xx and AD77xx devices based on input parameters.
|AD7791 IIO Low Power Sigma-Delta ADC Linux Driver||Device Drivers||HTML|
|BeMicro FPGA Project for CN0271 with Nios driver||FPGA HDL||HTML|
Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.
|Price*(100-499)||Price*1000 pcs||RoHS||View PCN/ PDN||Check Inventory/
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