AD7730: CMOS, 24-Bit Sigma-Delta, Bridge Transducer ADC for Load Cell Applications
The AD7730 is a complete analog front end for weigh-scale and pressure measurement applications. The device accepts low-level signals directly from a transducer and outputs a serial digital word. The ...More
AD7730: CMOS, 24-Bit Sigma-Delta, Bridge Transducer ADC for Load Cell Applications
Product Description
The AD7730 is a complete analog front end for weigh-scale and pressure measurement applications. The device accepts low-level signals directly from a transducer and outputs a serial digital word. The input signal is applied to a proprietary programmable gain front end based around an analog modulator. The modulator output is processed by a low pass programmable digital filter, allowing adjustment of filter cutoff, output rate and settling time.
The part features two buffered differential programmable gain analog inputs as well as a differential reference input. The part operates from a single +5 V supply. It accepts four unipolar analog input ranges: 0 mV to ±10 mV, +20 mV, +40 mV and +80 mV and four bipolar ranges: ±10 mV, ±20 mV, ±40 mV and ±80 mV. The peak-to-peak resolution achievable directly from the part is 1 in 230,000 counts. An on-chip 6-bit DAC allows the removal of TARE voltages. Clock signals for synchronizing ac excitation of the bridge are also provided.
The serial interface on the part can be configured for three-wire operation and is compatible with microcontrollers and digital signal processors. The AD7730 contains self-calibration and system calibration options, and features an offset drift of less than 5 nV/°C and a gain drift of less than 2 ppm/°C. The part is available in a 24-pin plastic DIP, a 24-lead SOIC and 24-lead TSSOP package.
Design Tools
AD7730/AD7730L/AD7731 Digital Filter Model
ΣΔ ADC Register Configuration Assistant
Easily program the configuration registers for the sigma delta ADCs. Use pu...
Features
- Resolution of 230,000 Counts (Peak-to-Peak)
- Offset Drift: 5 nV/°C
- Gain Drift: 2 ppm/°C
- Line Frequency Rejection: >150 dB
- Buffered Differential Inputs
- Programmable Filter Cutoffs
- Specified for Drift Over Time
- Operates with Reference Voltages of 1 V to 5 V
Diagrams
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- Other Diagrams
- Symbols and Footprints
Functional Block Diagram for AD7730
CMOS, 24-Bit Sigma-Delta, Bridge Transducer ADC for Load Cell Applications
Other Diagrams for AD7730
CMOS, 24-Bit Sigma-Delta, Bridge Transducer ADC for Load Cell Applications
AD7730 Pin Configuration
Functional Block Diagram for AD7730