CN0419

USB Isolation

USB is the serial interface of choice for most computer peripherals. Supported by all common commercial operating systems, it enables on-the-fly connection of hardware and loading of drivers. Data transfer modes handle everything from large bulk data transfers for memory devices, to isochronous transfers for streaming media, to interrupt-driven transfers for time critical data such as mouse movements. USB operates at three data transfer rates: low speed (1.5 Mbps), full speed (12 Mbps), and high speed (480 Mbps).

The USB physical layer consists of only four wires: two provide 5 V power and ground to the peripheral device; the other two, D+ and D–, form a twisted pair that carries differential data with a signaling voltage of 3.3 V. The data is organized into data frames or packets. Each frame can contain bits for clock synchronization, data type identifier, device address, data payload, and an end of packet sequence

Control of this complex data structure is handled at each end of the cable by a serial interface engine (SIE). This specialized controller— or portion of a larger controller, which usually includes the USB transceiver hardware, takes care of the USB protocol. It handles all flow of control on the bus, enabling and disabling the line drivers and receivers, as required. 

The primary challenges in developing a USB isolator are properly determining the direction of data transmission and when to disable drivers to allow an idle bus state. The packet oriented nature of USB data allows a simple method of determining data direction without the overhead of a complete SIE. When the bus is idle, pull-up and pull-down resistors hold the USB in an idle state with no buffers driving the bus.

These challenges have been met with the ADuM4160 USB port isolator, based on Analog Devices iCoupler technology. The ADuM4160 provides mechanisms for detecting the direction of data flow and control over the state of the output buffers. Data direction is determined on a packet by packet basis. By combining high speed CMOS and monolithic air core transformer technology, ADuM4160 provides outstanding performance characteristics and is easily integrated with low and full speed USB-compatible peripheral devices.

USB Speed Selection

The ADuM4160 has several options for power, bus speed, and electrostatic discharge/electrical overstress (ESD/EOS) protection that must be determined. The ADuM4160 does not support high speed operation and blocks handshaking signals that are used to negotiate that speed. High speed mode starts as a full speed configuration. The peripheral requests high speed support through a process called a high speed chirp. The ADuM4160 ignores the high speed chirp; therefore, the request for high speed operation is never passed to the host, and the peripheral continues to work at full speed. 

Because the peripheral operates at a single speed, the isolator is hardwired for the desired speed setting, either full speed or low speed. For the ADuM4160 to operate at full or low speed, the SPU and SPD signals must be configured properly. In this application, a switch at the upstream side allows the user to select between low and full speed. An optocoupler was used to transfer the same pulse signal from the SPU pin on the upstream side to the SPD pin on the downstream side. To switch between the two modes, flip the actuator of the S1 switch to full speed (FS) mode for full speed operation and to low speed (LS) mode for low speed operation. Figure 3 and Figure 4 show the switch position for each mode of operation.

When the circuit is functioning, packets are detected and data is transferred from one side of the isolation barrier to the other. Data shown in Figure 5 show a typical full speed transaction as time domain data. Features to note in the real-time data are the passive idle state at the start of the packet, which transitions to a driven J state, and then the end of packet at the end of the transaction that shows as a single-ended zero state followed by an idle J state. It is the automatic flow of control and the handling of these special logic states that make the ADuM4160 chip operate. 

Power Isolation

Driving an isolated USB peripheral requires use of an isolated dc-to-dc converter to supply power to the downstream port and cable. To satisfy the requirements of the USB specification, the downstream segment of the cable must provide 5 V power to the peripheral device. An isolated dc-to-dc converter, such as the ADuM5020, can provide this power with enough left over to provide power for downstream devices with low power requirements.

Based on the Analog Devices iCoupler technology, the ADuM5020 dc-to-dc converter provides regulated, isolated power that is below CISPR22 Class B limits at full load on a 2-layer printed circuit board (PCB) with ferrites. It implements a split controller architecture with isolated pulse-width modulation (PWM) feedback that transfers power to the secondary side rectified and regulated to 3.3 V or 5.0 V, depending on the setting of the VSEL pin.

The ADuM5020 provides up to 100 mA isolated power. The ADuM4160 V_BUS2 pin draws up to 8 mA, leaving 92 mA available for the peripheral.

Protection Scheme

Common-mode chokes and transient-voltage-suppression (TVS) diodes are placed on the DD+/DD− and UD+/UD− data lines for differential noise and ESD protection respectively. On the ADuM5020, ferrite beads are placed between the V_ISO and GND_ISO pins to reduce the emissions at the 180 MHz primary switching frequency and the 360 MHz secondary side rectifying frequency and harmonics

The circuit is fully isolated for transients up to 5 kV. It allows common-mode voltages; however, it is not recommended for performing safety related testing, such as high voltage withstand testing. Perform this type of testing on the component level or on a production board.