Design Note 311: Dual Output Supply Powers FPGAs from 3.3V and 5V Inputs

Introduction

FPGAs often require multiple power supplies: one for the core voltage (usually 1.8V, but sometimes as low as 1.2V) and at least one more for the I/O circuitry (often 2.5V). The available input supply is either 3.3V or 5V. One way to provide the multiple step-down conversions is via multiple switcher-based power supplies; however, this may be more complicated and cumbersome than is warranted, especially if the I/O does not draw much current. In such instances, the dual output LTC1704 is a simple and space-saving option. It can supply two voltages with its versatile high frequency switcher and its space-saving LDO controller.

Circuit Description

With a 5V input, the switcher channel can generate core voltages from 0.8V to 3.3V at currents up to 15A. This 550kHz switcher reduces required LC filter size while providing fast response to dynamic loads. Efficiency of the switcher is very high and features No R_SENSE^™ technology, where the output current is sensed via the MOSFET’s on resistance, to improve efficiency compared with regulators using a sense resistor.

The LDO uses an external pass transistor to regulate the I/O voltage. The LTC1704 provides base currents up to 30mA to control the output voltage under varying load conditions. The circuit shown in Figure 1 provides 2.5V at 2A from a 3.3V supply.

The uncommitted collector and emitter of the external pass transistor gives the LDO versatility. It can convert 1.8V to 1.5V or 1.2V. At lower power levels, the input voltage can be as high as 5V. Output current would then be limited by thermal considerations.

Figure 1 shows a dual output 1.8V/10A and 2.5V/2A circuit using the LTC1704. This is a typical FPGA application where 1.8V is the core voltage and 2.5V is for I/O. In this case, the switcher supplies 1.8V and the LDO supplies 2.5V, taking power from either 3.3V or 5V for the external pass transistor.

The switcher channel uses all N-channel MOSFETs for improved efficiency and lower cost. R9 and R10 program the output voltage. Type III compensation—C9, R4, C8, R8 and C13—allows maximum flexibility in the choice of LC filter components. The current limit circuit uses the R_DS(ON) of the bottom MOSFET to sense inductor current. A 10μA current from the I_MAX pin flowing into R2 produces the reference voltage for current limit. The current limit circuit discharges the soft start capacitor C7 to control output current.

The linear regulator uses an external high gain low V_CESAT NPN series pass transistor Q3. The output voltage is 0.8V • (1 + R6/R11). The maximum output voltage is limited to (V_CC – V_DRV – V_BE) and by (V_C(Q5) – V_CESAT).

The maximum driver voltage drop (V_DRV) is 1.1V at 30mA. Limiting the base drive current provides short circuit protection. R7 programs max base current drive. Pulling REGLIM down to below 0.8V turns off the LDO.

Figure 2 shows the efficiency of the 1.8V output over a 1A to 10A current range, over which the efficiency remains close to 90%. Figure 3 shows the load step response of the switcher to a 4A to 10A load step. At each edge of the load step, less than 50mV transient deviation occurs when using three 180μF 4V solid polymer capacitors.

Conclusion

The LTC1704 is suitable for applications requiring a high power switcher and a moderate power linear regulator where the cost and complexity of a second switcher would be unjustifiable. For applications that require more power from the 2nd output than is practical with a linear regulator, the LTC1702A is a good choice with its two switchers that can deliver up to 15A each.

著者

Haresh Patel