ADSP-21060
新規設計には非推奨SHARC, 40 MHz, 120 MFLOPS, 5v, floating point
- 製品モデル
- 1
- 1Ku当たりの価格
- 価格は未定
製品の詳細
- 40MHz (25ns instruction rate) SISD SHARC Core
- 120MFLOPs peak performance
- Code compatible with all SHARC processors
- Supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math
- 4Mbits of on-chip dual-ported SRAM
- Glueless connection for scalable DSP multiprocessing
- Six Link Ports for point to point connectivity and array multiprocessing
- Two synchronous serial ports with independent transmit and receive functions
- 10 Channel DMA controller
- Host Processor Interface
The ADSP-21062 and ADSP-21060 SHARC DSPs are signal processing microcomputers that offer new capabilities and levels of performance. The ADSP-2106x SHARCs are 32-bit processors optimized for high performance DSP applications. The ADSP-2106x builds on the ADSP-21000 DSP core to form a complete system-on-a-chip, adding a dual-ported on-chip SRAM and integrated I/O peripherals supported by a dedicated I/O bus.
Fabricated in a high speed, low power CMOS process, the ADSP-2106x has a 25 ns instruction cycle time and operates at 40 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.
The ADSP-2106x SHARC DSP represents a new standard of integration for signal computers, combining a high performance floating-point DSP core with integrated, on-chip system features including a 4 Mbit SRAM memory (2 Mbit on the ADSP-21062, 1 Mbit on the ADSP-21061), host processor interface, DMA controller, serial ports, and link port and parallel bus connectivity for glueless DSP multiprocessing.
ドキュメント
データシート 1
アプリケーション・ノート 40
プロセッサ・マニュアル 3
集積回路異常 1
レガシー・エミュレータ・マニュアル 2
Analog Dialogue 2
| 製品モデル | ピン／パッケージ図 | 資料 | CADシンボル、フットプリント、および3Dモデル |
|---|---|---|---|
| ADSP-21060CZ-160 | 240-Lead CQFP Mount, Heat Slug Up |
| 製品モデル | 製品ライフサイクル | PCN |
|---|---|---|
| 該当なし | ||
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10 18, 2023 - 23_0154 ADSP-21060/ADSP-21060L Ink Mark to Laser Mark Conversion CQFP Products |
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| ADSP-21060CZ-160 | ||
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7 13, 2018 - 17_0086 ADSP21060 CQFP Assembly Transfer to Rochester Electronics |
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| ADSP-21060CZ-160 | ||
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6 18, 2010 - 07_0093 Conversion to Laser Mark for all ADSPXXXX, ADSSTXXXX, and PC Audio Codecs Ink on Plastic Encapsulated Parts |
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| ADSP-21060CZ-160 | ||
これは最新改訂バージョンのデータシートです。
ソフトウェア・リソース
ソフトウェアおよびツール異常 1
評価用ソフトウェア 0
ツールおよびシミュレーション
IBISモデル 2
BSDLモデル・ファイル 3
Designing with BGA
Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages
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