Multiband, Multistandard Transmitter Design Using the RF DAC


Wireless communication networks are evolving rapidly. Fast expansion of consumer demand for data services is calling for wider coverage and ever more bandwidth, while multiple air standards coexist. Different radio technologies and increasing frequency allocations make it more complex to control networks and reduce costs. Wireless service providers are looking for solutions that not only protect their existing investments, but also simplify systems for future network upgrades and capacity expansion.

Meeting all these demands requires an efficient and comparatively inexpensive solution to the problem of building multiband, multistandard radio (MB-MSR) base stations. One of the technological advances that supports this evolution of the base station design is the new generation of radio frequency digital-to-analog converters (RF DACs), such as the AD9129 from Analog Devices. In this article, we examine the main aspects that need to be considered in a design of an MB-MSR transmitter using RF DACs.

Traditional Transmitter Architectures

Figure 1(a) shows an architecture that is widely implemented in the wireless base station transmitter design. The inphase (I) and quadrature (Q) input data is digitally modulated and converted in the DAC to a pair of I and Q output signals at an intermediate frequency (IF). The IF should be properly selected so that it is high enough for the band-pass filter to reject the modulation image but low enough for the DAC to maintain good output performance. This architecture has been successfully implemented in single band radio designs for multiple generations. The advantages and design trade-offs are well known. However, there are a few inherent limitations associated with this architecture that would make it more difficult to plan the frequencies in a multiband radio design. Figure 1(b) illustrates one of the limitations often encountered when directly applying this architecture to a multiband design. In a single band radio, the harmonics of the signal at the DAC output are typically treated as out-of-band spurious signals and rejected by the low-pass filter following the DAC. In the dual band application, these harmonics may become in band and fall inside of the higher transmit band. This limitation is avoided in the approach shown in Figure 1(c). The two signal bands are placed centered around dc in the complex domain. The harmonics become out-of-band and can be filtered. This approach also has a lower requirement for the DAC sample rate and low-pass filter bandwidth due to its narrower real signal bandwidth. The problem with this frequency plan, nevertheless, occurs at the modulator output. Depending on the distance of each band from the local oscillator (LO), the modulation image of each signal tends to fall in the vicinity of the other band. Although it is possible that a sophisticated quadrature error correction (QEC) algorithm can help suppress the images, it may add an extra burden on the baseband signal processing engine because analog filtering techniques are not available when the images are in band.

Figure 1. Example of frequency plans of a dual band radio (Band 1 and Band 3) in a traditional transmitter architecture; a) transmitter signal chain line up; b) IF conversion; c) direct conversion.

Direct-to-RF Transmitter Architectures

From an architecture perspective, the DAC plays a critical role in a radio transmission system. Its speed and performance determine how close to the antenna the digital-to-analog conversion can be performed. The RF DAC extends the scope of digital signal processing beyond the baseband domain out to the antenna. It enables synthesis of the baseband digital signal directly at the final output frequency, which essentially absorbs the analog upconversion operation of the traditional architecture into the digital domain. Digital frequency conversion provides greater flexibility and higher performance in terms of frequency planning and noise. This is especially attractive to the MB-MSR design.

The frequency planning is more flexible using the RF DAC because the digital modulation is ideal and does not generate modulation images that can interfere with signals. The DAC sample clock frequency is the only design variable that needs to be determined in the frequency planning. Figure 2 shows the architecture of direct RF synthesis with an RF DAC and its capability of supporting dual band applications without having issues in the traditional architecture. In this example, the dual band signal is directly synthesized at the final transmission band frequencies. The DAC sample clock frequency is chosen so that the harmonics of the signals fall far out of the band of interest and can be filtered before the signal is fed into the next RF stage.

Figure 2. Example of frequency plans of a dual band radio (Band 1 and Band 3) in a direct-to-RF transmitter architecture; a) transmitter signal chain line up; b) direct-to-RF conversion.

The noise performance in the direct-to-RF architecture is better for two reasons. The first is elimination of the analog upconversion stage. In traditional architectures, the overall noise figure of the transmit signal chain is typically dominated by the modulator noise since the noise contributed by the DAC at the modulator output is usually lower than the modulator’s output referred noise floor. Removing the modulation stage allows the system designer to lower the system noise figure by taking advantage of the DAC’s low noise floor and the high gain of the RF amplifier. The second reason for better noise floor is reduction of the insertion loss for the antenna when transmitting in multiple bands since no combiner is needed. The RF DAC’s ability to synthesize multiple bands improves the overall performance of the system in addition to reducing complexity, and therefore size and cost.

Board Design Considerations for the Direct-to-RF Architecture

Typical multiband communication systems include data interface logic, a field programmable gate array (FPGA) or specialized ASIC, DACs, filters, gain blocks, and RF power amplifiers. Within a channel card, the DAC acts as the interface between the digital logic and the RF analog output driving network. The DAC plays an important role in the system as its performance, sample rate, and bandwidth all influence the system architecture and design.

Some key circuits, such as the DAC output path, clock circuit, transmission lines, power supply, and return paths, need particular attention to ensure their designs are correct for optimal performance. Analysis and simulation of these blocks as well as the DAC printed circuit board (PCB) may be needed.

In addition, power supply routing can be challenging. The digital logic includes I/O and core logic power supplies while the RF output network can include as many as four or five additional power supplies. The power domains must be isolated from one another and signal return paths need to be carefully managed to ensure no crosstalk between supply domains. Keeping the power supplies isolated from one another is crucial to low noise performance.

The main DAC clock is one of the most critical signals on the system card. The DAC clock is a differential signal and is isolated from other signals via fences. In addition, return paths are controlled to ensure no coupling or crosstalk. Any signals coupling onto the clock will directly appear at the output of the DAC. Digital signals corrupting the clock reduce the noise margin in the system. Even the DAC outputs must be prevented from coupling onto the clock as this will cause second harmonics and potentially other harmonics to appear in the output spectrum. It is preferable to keep the clock driver as close as possible to the DAC in order to reduce noise and other coupling concerns. The DAC outputs are connected to their load by transmission lines. The impedance of these transmission lines is carefully controlled to the load to ensure predictable behavior of the DAC output signals. The RF DAC’s output impedance is related to the package as well as the die, so the laminate’s effects must be included in the analysis and simulation of the output stage. Matched impedance between the DAC and the load is critical to maximize the power transfer from the DAC to the destination and also to minimize reflection from the destination back to the DAC. Proper transmission line design improves the signal-to-noise ratio (SNR), which is necessary for a good multiband communication system.

Today, typical multiband communication systems include multiple RF chains that consist of IF DACs, quadrature modulators, band-pass filters, RF power amplifiers, and a final filter stage before the antenna. This architecture requires significant board space to fit multiple frequency bands into a single transmitter. This large number of components draws significant amounts of power and generates a fair amount of heat that requires removal via a heat sink or a fan, which adds complexity and cost to the overall system design. Since RF DACs have enough bandwidth to synthesize multiple RF bands, they can be used to create a single transmitter with a multiple band output. For example, a triple band transmitter that may require three pairs of IF DACs, three modulators, and three band-pass filters may be replaced by a single RF DAC and output filter that generate all three bands. As power amplifier designs migrate to wider bandwidths, even greater savings of board space can be realized as the number of components in distinct RF chains is reduced to those needed only after the power amplifier. Thus, a multiple band transmitter could be implemented with an RF DAC, an output filter between the DAC and power amplifier, a power amplifier, and output filters between the power amplifier and the antenna.

Measurement Results

Signal Chain

Figure 3 shows the output of the AD9129 RF DAC at a sample rate of 2764.8 MSPS using a selectable mode in the DAC that enables use of the second Nyquist zone. Eight 5 MHz wide W-CDMA channels were synthesized at three different bands. Two channels were created at 1825 MHz to 1835 MHz, two other channels at 1845 MHz to 1855 MHz, and four channels at 2130 MHz to 2150 MHz. The signals were generated in a programmable gate array (FPGA) and then directly synthesized by the RF DAC.

Figure 3. Measured spectrum analyzer plots of an AD9129 RF DAC output at sample rate of 2764.8 MSPS; a) eight 5 MHz wide W-CDMA channels in the second Nyquist zone; b) two 5 MHz wide W-CDMA channels at 1825 MHz to 1835 MHz; c) two 5 MHz wide W-CDMA channels at 1845 MHz to 1855 MHz; d) gap of two channels between W-CDMA channels; e) four 5 MHz wide W-CDMA channels at 2130 MHz to 2150 MHz.

Figure 4 shows the output of the AD9129 at a sample rate of 2764.8 MSPS using a mode that enables synthesis in the first Nyquist zone. Four 5 MHz wide W-CDMA channels with four LTE downstream channels were synthesized at two different bands. Four W-CDMA channels at 871 MHz to 891 MHz and four LTE downstream channels were created at 729 MHz to 749 MHz.

Figure 4. Measured spectrum analyzer plots of an AD9129 RF DAC output at sample rate of 2764.8 MSPS; a) four MHz wide W-CDMA channels and four 5 MHz LTE channels in the first Nyquist zone; b) four 5 MHz wide LTE channels at 729 MHz to 749 MHz; c) four 5 MHz wide W-CDMA channels at 871 MHz to 891 MHz.


Modern wireless communication networks demand flexible, easy to upgrade multiband, multistandard base stations. The direct-to-RF transmitter architecture provides a cost/performance effective solution for the multiband, multistandard radio transmitter design. The advancement of the RF DAC technology, such as the AD9129 from Analog Devices, has helped lower the threshold of a multiband and multistandard radio design and has shown a promising trend of having more designs using the direct-to-RF architecture in the future.


Assaf Toledano

Assaf Toledano

Assaf Toledano is an applications engineer manager in the RFMG Group at Analog Devices. He received his B.S.E.E. from the University of Massachusetts at Lowell in 2004 and his M.S.E.E. from Northeastern University in 2009. He joined Analog Devices in 2004 and worked as a test application engineer for two years. He then moved to the High Speed Digital-to-Analog Converters Group and worked there for seven years as a product engineer. He has published several technical articles both inside and outside of Analog Devices.


Yi Zhang

Yi Zhang is an applications engineer for the High Speed Converter Group at Analog Devices. He has worked for ADI since 2007. Yi has over eight years of experience in high speed converter products and high speed mixed-signal applications. He is the author of the data sheets, application notes, and technical articles for several generations of high speed DAC products. Yi holds a master's degree in electrical engineering from Cornell University.