Optimized Circuit Design for HART Enabled 4 mA to 20 mA Inputs

The HART (highway addressable remote transducer) protocol allows for bidirectional 1.2 kHz/2.2 kHz FSK (frequency shift keying) modulated digital communication over traditional analog 4 mA to 20 mA current loops. This allows for interrogation of the sensor/actuator, and provides significant advantages during equipment installation, monitoring, and maintenance. HART provides benefits to maintenance crews using a portable secondary device to interrogate the sensor/actuator, but to fully realize all the benefits HART can bring, the sensor/actuator must be connected to a control system with HART enabled current inputs or outputs. This article will focus on HART enabled current inputs and the challenges associated with adding HART functionality to already space constrained 4 mA to 20 mA input designs.

First, let’s focus on the HART FSK transmit circuitry. Figure 1 shows a traditional approach to the HART FSK transmit circuitry, following a discussion of this circuit we will show an improved circuit design, which results in space and cost savings.

Figure 1. Traditional HART FSK transmit circuit.

In Figure 1, Rsense converts the 4 mA to 20 mA signal to a 1 V to 5 V signal to be read by an ADC. The HART FSK transmit circuitry ac couples ±500 mV HART FSK signals to the 4 mA to 20 mA loop via C1. These signals are either sinusoidal or trapezoidal waveforms. A good buffer with enough drive strength is required at the output of the HART modem as the Rsense represents a low impedance and there may also be significant capacitance on the current loop cabling. When the HART is not transmitting, the buffer output would present a low impedance to the loop, which could compromise the 4 mA to 20 mA signaling. For this reason the switch (SW1) is used in series with the buffer output to provide a high impedance when not transmitting.

The 4 mA to 20 mA loop can swing between 1 V and 5 V while SW1 is open. As this change is ac-coupled to SW1, the switch could see up to ±4 V at its input. For this reason a bipolar supply of ±5 V or greater would be required for the switch, or alternately an opto switch could be used. A tristate buffer is another option, though again this buffer would require bipolar supplies. Another option is to use transformer isolation. Given the HART signal frequencies, an audio transformer would be required, which is likely to be bulky and consume a large amount of board area.

Figure 2 shows an improved HART FSK transmit circuitry design, which has benefits in terms of reduced space and cost. In this circuit, the AD5700 HART modem has enough drive strength to drive the ±500 mV FSK signals directly onto the current loop without the need for an external buffer.

Figure 2. Improved HART FSK transmit circuitry.

When the modem is not transmitting, the AD5700’s FSK output is biased to 0.75 V with an impedance of 70 kΩ. R2 and R3 provide a stronger 0.75 V bias, with ac impedance of R2 and R3 = 1.7 kΩ. The high-pass filter formed by the this 1.7 kΩ and C1 ensures that the worst-case 4 mA to 20 mA input signal, which is ±16 mA at 25 Hz across the 200 Ω Rsense, only results in the HART modems FSK output being driven to between 0 V and 1.5 V. This means that the whole input can be run from unipolar supplies as low as 1.62 V, with 1.62 V being the minimum supply for the HART modem.

Another consideration is the input impedance, which should be greater than 230 Ω. It is to ensure a large enough input impedance that the 250 Ω input resistor has been split into 50 Ω and 200 Ω. The ac input impedance is R1 + (Rsense || R2 || R3) ≈ 230 Ω. If needed, this impedance can be increased by increasing the values of the 0.75 bias resistors, R2 and R3. The additional 50 Ω in the FSK transmit path will attenuate the FSK signals somewhat, but the voltages will still meet the requirements of the HART specification.

As the current loop is slewing there will be some current flow through C1, R2, and R3. One must ensure that this will not significantly affect the 4 mA to 20 mA analog signal. Considering < 0.1% as an acceptable error contribution equates to 7 time constants (τ). So 7τ = 7 × R × C = 7 × (R2 || R3) × C1 = 30 ms. The 4 mA to 20 mA analog signaling is limited to 25 Hz, which corresponds to a 40 ms period. As this is longer than 7 time constants, this means that the additional current measurement error will always be < 0.1%.

This improved circuit (shown in Figure 2) has eliminated the need for a buffer and a switch, as well as eliminating the need for a bipolar power supply. These three factors provide significant space and cost savings for a system over the traditional HART FSK transmit circuitry.

Circuitry for the HART FSK input is shown in Figure 3. This provides a band-pass filter to reject the low frequency analog signaling as well as provide immunity from higher frequency interferers. The filter shown is specifically tailored for the AD5700 and will vary for different HART modems. One feature of this band-pass filter is the 150 kΩ input impedance provided by R1, which provides an inherent high level of protection from transient events.

Figure 3. HART FSK input.

Circuitry for the 4 mA to 20 mA current measurement is shown in Figure 4. The 200 Ω precision Rsense resistor converts the 4 mA to 20 mA signals to a 0.8 V to 4 V signal to be converted by the ADC. This is followed by a double pole low-pass filter R2, C1, R3, C2 to reject the HART FSK signals. This signal is then fed to an ADC for conversion.

Figure 4. Current measurement circuitry.

The circuitry described in this article has been built and tested and is available as a reference circuit for a PLC/DCS quad-channel voltage and current input with HART compatibility—CN0364. The circuitry described in this article is fully implemented on this board, with the one addition that the board also supports multiplexing the HART between the four input channels. For testing the relevant channels, the FSK transmit switch can be left open or closed, when left open the circuit would be identical to that in Figure 2. Documentation for this reference design is freely available at www.analog.com/CN0364, and hardware is also available for purchase.

This article has outlined how to implement hardware for a HART enabled analog input. It has also shown an improved HART FSK transmit circuit using the AD5700 HART modem. This improved circuit eliminates the need for any external buffers or switches saving both board space and cost. It also eliminates the need for bipolar supplies, which saves space, cost, and power supply complexity.

Authors

Derrick Hartmann

Derrick Hartmann

Derrick Hartmann is an applications engineer in the DAC group at Analog Devices in Limerick, Ireland. Derrick joined ADI in 2008 after graduating with a bachelor’s degree in engineering from the University of Limerick.

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Michal Brychta

Michal is senior staff applications engineer with focus on industrial automation systems. He works for Industrial and Instrumentation market segment group, Analog Devices, and is based in Limerick, Ireland. Prior to his current role, Michal was product applications engineer supporting ADI sigma-delta converters, and before that he worked for 10 years as an instrumentation and industrial circuit and system design engineer. Michal holds masters degree in electronic engineering from Technical University in Brno, Czech Republic.