Adaptive Real-Time DSP Architecture to Monitor Harmonic Components and Various Power Quality Factors in Electric Power Grids

In the past, harmonic analyzers were expensive and hard to incorporate into large-scale manufactured meters. Consequently, harmonic pollution analysis of power grids was difficult and done only from time to time at specific locations by trained operators. Today, the integration of more signal processing inside smaller and more affordable chips can empower efficient usage and monitoring of the power grid.

Over the past few decades, we have experienced an exponential growth of power supply systems with nonlinear characteristics that cause serious harmonic pollution. This can lead to several adverse effects like overheating and premature aging of electrical equipments, additional loss on transmission lines, and malfunction of protective relays, just to mention a few.

Therefore, there is a growing concern and effort being put into achieving better management of the grid. One of the best methods would be to have more observation and analysis points in place for longer periods of time located throughout the grid. The best device that meets these requests could be part of the smart energy meter now being deployed at accelerated rates all over the world. An ASIC for these meters that combines energy metering features with harmonic analysis capabilities might be the right answer at the right time. Keeping in mind that spectral analysis is not a trivial task when considering the amount of DSP resources that need to be embedded inside a piece of silicon, which still needs to be cheap and small and consume little power, we will discuss a DSP architectural solution that tries to satisfy all these demands.

Fundamental Frequency Estimation & Spectral Components Extraction

The dynamic balance between the constantly-changing load on the power grid and the more-constant generation output can pull the primary power frequency slightly low at high loads or slightly high when the load drops. The amount of the frequency shift is fairly small in countries with well-developed, closely-monitored grids, but can be enough to affect electrical equipment in areas where the grid is less well-controlled. This has led to considerable effort and research to find the most efficient methods for frequency tracking based on optimizing various parameters (accuracy, speed, noise and harmonics immunity, etc).

The frequency of a power network is just as important an operational parameter as current and voltage for the safety, stability, and efficiency of the power system. Reliable frequency measurement is a prerequisite for effective power control, load shedding, load restoration, and system protection.

There are many methods to detect and estimate a frequency. For example, the zero-crossing method detects frequency by measuring the time interval between two consecutive zero-crossing points. This has the advantage of being quite easy to implement, but the drawback is low accuracy and sensitivity to the influence of harmonics, noises, dc components, etc. A DFT based algorithm can estimate the frequency by using sampling sequence, but it’s very sensitive to harmonics in the input signal. For this DSP architecture, a method based on digital PLL was investigated and proved to be efficient and highly immune to noise, while also providing very accurate frequency estimation.

The standard digital PLL structure with its three major blocks is shown in Figure 1. A phase error detector sends the output to a loop filter, which further controls a digital oscillator with the aim of minimizing the phase error. As a result, a value that estimates the fundamental frequency of the input signal can be obtained in the end. The control loop is optimized to give the best locking parameters performance in the range of standard grid frequencies: 45 Hz to 66 Hz.

Figure 1. Frequency Estimation Based on Digital PLL Structure.

Once we know the precise frequency of the components to be extracted from the spectrum, we can investigate various options for doing that. When talking about spectral analysis in sampled systems, the Discrete Fourier Transform (DFT) comes to mind as the tool for mapping a signal from the time into frequency domain. There are multiple numerical algorithms and processing architectures dedicated for its implementation, with the FFT being the most famous. Each one of them has advantages and disadvantages when considering the amount of information extracted versus the amount of DSP resources required.

The theory of ac power systems that uses phasors in the complex plane to represent voltages and currents will match well with a variation of the DFT that delivers the spectral components in a similar format. Basically, a straight implementation of the DFT formula at the frequency of interest will do exactly that. But, in order to give a real-time characteristic of the measurements, a recursive approach to obtain the summation element from the DFT formula was taken. There are several ways of doing that (depending on the DSP resources available), but one important aspect to keep under control is to minimize the spectral leakage and the errors caused by noise.

Figure 2 shows a block diagram of how the spectral components extraction works.

Figure 2. Extracting the Fundamental and Harmonic Spectral Components.

The sampled voltage and current of a certain phase, together with the value of the fundamental frequency, is passed through a computational block that provides the results as phasors. For each fundamental frequency and some user selectable harmonic frequency there will be a pair of phasors provided (voltage and current). Having these components, we can apply known methods from electrical power theory to extract the rms values and the powers. The rms values are equivalent to the magnitude of these phasors, while the apparent powers are equal to the product of these magnitudes. By projecting the current phasor straight on the voltage and multiplying the two we can get the active power. The other orthogonal element of the decomposed current is multiplied again with the voltage to give us the reactive power.

At this point, we should mention possible advantages (motivations) for taking the real-time approach. For example, the monitoring of inrush currents in transformers might be very well served by this architecture. These currents occur during energization of a transformer caused by part cycle saturation of the magnetic core. The magnitude is initially 2× to 5× the rated load current (then slowly decreases) and has an unusually high 2nd harmonic, with the 4th and 5th also carrying useful information. By looking only at the total rms current, the inrush current could be mistaken for a short circuit current, and the transformer could erroneously be taken out of service. Therefore, it is important to obtain an accurate real-time value of the magnitude of the 2nd harmonic to recognize this scenario. Applying a complete FFT transform when we need the information for just a few harmonics might not be very efficient.

So-called triplens are another good example of why this method of computing selective harmonic components might be more efficient than an FFT approach. These are odd multiples of the third harmonic (3, 9, 15, 21 ...), and they need special attention at times. For ground-wye systems, where the current flows on the neutral, they become an important issue. Two typical problems are overloading the neutral and telephone interference. Occasionally, some devices malfunction because the line-to-neutral voltage is badly distorted by the triplen harmonic voltage drop in the neutral conductor. The presented solution can monitor just these harmonics on the neutral current and on the sum of all phase currents.

Top Level DSP Architecture

The previously presented DSP blocks have been added to an existing architecture that computed total rms values and powers based on their basic formulas. We also incorporated an element that computes several power quality factors. First, we compute the harmonic distortion (HD) as a way to normalize all the harmonic rms values versus the fundamental one. Then, by using the total and fundamental rms values, we compute the total harmonic distortion plus noise (THD+N) based on the standard definition. Finally, all the power factors are extracted as a ratio of active versus apparent powers. As we can observe in Figure 3, all this signal processing is done for the three phases in parallel, excepting the harmonic analysis block, which can be assigned only to a certain phase at a given time.

Figure 3. Top-Level DSP Architecture.

The computation of harmonic power factors enables the location of the sources for harmonics in a grid. While the industry still debates about the best approach for locating the dominant source of harmonics, one of the classic methods is based on the "direction of active power flow." This translates to knowing the sign of the active power at that particular harmonic frequency in one or various points of the system. A linear load supplied with distorted voltage draws active power for each harmonic, while if the nonlinear element exists at the customer side, this power is being supplied to the network. This is determined by measuring the phase angles of voltage and current of the polluting harmonic and then computing their difference. That’s not necessary anymore with this architecture because the harmonic power factors can provide that information.

This DSP architecture has been implemented successfully for a 3-phase energy metering part having the following HW resources: single MAC architecture with 16 MHz operating clock frequency for a signal sampled at 8 kHz and 1k word of data memory. The fundamental measurements are computed continuously for all three phases while the harmonic analyzer can extract continuously three random harmonic values from a given phase (A, B, or C). The architecture is scalable, and some performance parameters were optimized based on the known set of operating conditions in the power grid.

Not providing all the harmonic values at once might look like a disadvantage, but we need to remember that harmonic pollution on the power grid matters most from the perspective of being a quasi-stationary phenomenon. In fact, for industrial and commercial loads, it’s recommended to analyze the harmonic pollution for at least a week, and any sporadic measurements should be avoided. Using these premises, the versatility of this architecture allows one to achieve an FFT-like result by sweeping through all the available harmonic content on all three phases.


In the past, harmonic analyzers were expensive and hard to incorporate in large-scale manufactured meters. Therefore, the harmonic pollution analysis of power grids was difficult and done only from time to time at specific locations by trained operators. The integration of more signal processing inside small and affordable chips has the potential of radically changing this and opening the way for a much more efficient understanding and usage of the power grid that will benefit the utility and the consumer as well. The presented DSP architecture has been incorporated inside one of latest parts (ADE7880) announced by the energy metering group from Analog Devices targeting polyphase markets.



Gabriel Antonesei