CN0340

The 65 dB range of the ADL5902 linear-in-dB true rms-responding RF detector can be extended using a stand-alone variable gain amplifier (VGA). The gain control input of the VGA is derived directly from the ADL5902 VOUT pin. This extends the dynamic range by the gain control range of the VGA (in practice the achieved range extension is slightly less). When this VGA also provides a linear-in-dB (exponential) gain control function, the overall measurement remains linearly scaled in decibels. The VGA gain must decrease with an increase in its gain bias in the same way as the ADL5902. All of these conditions are met by the AD8368. Figure 1 shows the circuit schematic.

The ADL5902 rms computation circuit uses a VGA leveling architecture. An internal linear-in-dB VGA with a negative gain control slope drives the input of a low-range rms detector. The output level of this detector is compared to the output of second setpoint detector using a current balancing architecture; one detector sources current and the other sinks current. If the output levels of the two detectors are not equal, the residual current charges or discharges a capacitor (capacitance is equal to the parallel combination of the internal 26 pF capacitance and the external capacitance on Pin 6 (CLPF) of the ADL5902. The integration increases or decreases the value of VOUT. With VOUT tied directly the gain control input of the ADL5902 VGA, this increases or decreases the VGA gain until the output levels from the two detectors are equal. When this point is reached, VOUT and the gain of the VGA settles. Because the ADL5902 VGA has a linear-in-dB transfer function, the resulting VOUT voltage is proportional to the log of the rms value of the input signal.

The detection range of the ADL5902 is primarily determined by the gain control range of its internal VGA. As the input signal decreases in size, VGA control voltage decrease until the VGA reaches maximum gain. For large and increasing input signals, the VGA gain control voltage increases (thereby decreasing the VGA gain) until minimum gain is reached.

Adding additional variable gain to the signal path extends the detection range of the circuit. The fed-back VOUT signal now drives both the ADL5902 VGA gain control input along with the gain control input of the AD8368 VGA. The AD8368 MODE pin must be tied low to make the gain control slope negative. Because the AD8368 VGA provides both gain and attenuation (GMAX = 22 dB GMIN = −12 dB), this extends the detection range at both the top and bottom end of the ADL5902 nominal range. However, to optimize the range extension, the voltage driving the gain control pin of the AD8368 must be correctly scaled.

While the nominal output voltage range of the ADL5902 rms detector is 0 V to 3.5 V, the AD8368 VGA requires a control voltage range from 0 V to 1 V to fully exercise its 34 dB gain control range. Therefore, the fed-back voltage from VOUT must be scaled down by a factor of 3.5. This is easily implemented using a resistor divider (R1 and R15 in Figure 1).

Figure 2 shows the resulting transfer function when the input power is swept at 167 MHz. Optimum linearity is achieved using a 4-point calibration with calibration points at +15 dBm, −15 dBm, −55 dB, and −70 dBm. A 2-point calibration can also be used, but results in degraded linearity across the input power range.

Note that the AD8368 on-board RF detector and automatic level control (ALC) function are not used in this circuit. Therefore, the DETI and DETO pins on the AD8368 can be left open.

RF Input Power Sensitivity

To achieve the excellent sensitivity shown in Figure 2, a narrow-band filter must be placed between the VGA and the detector as shown in Figure 1. Without a filter, the broadband output noise of the AD8368 swamps the low-end sensitivity of the ADL5902. Figure 3 shows a screenshot of the output noise calculation of the AD8368 performed in ADIsimRF. The AD8368 VGA is at maximum gain when the smallest input signals are present. With a 3 dB bandwidth of 800 MHz and assuming a first order roll-off, an equivalent noise bandwidth of 1272 MHz (that is, 800 MHz times 1.57) was used to calculate the output noise power from the VGA. This results in an output noise power level of approximately −51 dBm, which is almost 10 dB above the nominal input sensitivity of the ADL5902. Therefore, some filtering is essential to maximize low-end sensitivity.

Figure 4 shows the same noise calculation when an EPCOS B5070 SAW filter is added to the circuit with a center frequency of 167 MHz. In this calculation, the analysis bandwidth has been reduced to be equal to the bandwidth of the SAW filter (18 MHz).

With the dramatic narrowing of the noise bandwidth along with the 7.3 dB insertion loss of the filter, the integrated output noise of the VGA/SAW combination drops dramatically to −77 dBm, well below the input sensitivity of the ADL5902 rms detector. This ensures that the circuit is not noise limited when the VGA is at its maximum gain.

Temperature Stability

The ADL5902 incorporates a temperature compensation function. By setting the voltage on the TADJ pin (Pin 1), the detector’s intercept temperature stability at a particular operating frequency can be optimized. In the range extension circuit shown in Figure 1, any temperature variations in the gain of the VGA will degrade the overall drift of the circuit one-for-one (i.e. a 1 dB drift vs. temperature in the gain of the VGA will degrade the overall temperature stability by 1 dB). In the case of the AD8368 VGA, Figure 5 in the AD8368 datasheet shows that the gain drifts vs. temperature by approximately ±0.7 dB. Note that the intercept of the VGA transfer function drifts (that is, gain drift error is constant at all gains). Therefore, the detector and the VGA have similar temperature drift signatures. By adjusting the voltage on the ADL5902 TADJ pin, the combined temperature drift of the detector and VGA can be compensated. For the 167 MHz operating frequency, it was experimentally determined that a TADJ voltage of 0.2 V provided the optimum temperature compensation that is achieved in Figure 2.