PKD01

Obsolete

Monolithic Peak Detector with Reset-and-Hold Mode

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Part Details

  • Monolithic Design for Reliability and Low Cost
  • High Slew Rate: 0.5 V/µs
  • Low Droop Rate
    TA = 25°C: 0.1 mV/ms
    TA = 125°C: 10 mV/ms
  • Low Zero-Scale Error: 4 mV
  • Digitally Selected Hold and Reset Modes
  • Reset to Positive or Negative Voltage Levels
  • Logic Signals TTL and CMOS Compatible
  • Uncommitted Comparator On-Chip
  • Available in Die Form
PKD01
Monolithic Peak Detector with Reset-and-Hold Mode
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