Features and Benefits

  • 72dB ACLR at fOUT = 61.44MHz (Single-Carrier WCDMA)
  • Meets 3G UMTS, cdma2000®, GSM Spectral Masks (fOUT = 122MHz)
  • Noise Spectral Density = -151dBFS/Hz at fOUT = 16MHz
  • 90dBc SFDR at Low-IF Frequency (10MHz)
  • 86dBc SFDR at High-IF Frequency (50MHz)
  • Low Power: 511mW (fCLK = 100MHz)
  • User Programmable
    • Selectable 2x, 4x, or 8x Interpolating Filters
      • < 0.01dB Passband Ripple
      • > 99dB Stopband Rejection
    • Selectable Real or Complex Modulator Operation
    • Selectable Modulator LO Frequency: OFF, fIM/2, or fIM/4
    • Selectable Output Filter: Lowpass or Highpass
    • Channel Gain and Offset Adjustment
  • EV Kit Available (Order the MAX5893EVKIT)

Product Details

The MAX5893 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter (DAC) offers superior dynamic performance and is optimized for high-performance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x interpolating filter, a digital quadrature modulator, and dual 12-bit high-speed DACs on a single integrated circuit. At 30MHz output frequency and 500Msps update rate, the in-band SFDR is 84dBc while consuming 1.1W. The device also delivers 72dB ACLR for single-carrier WCDMA at a 61.44MHz output frequency.

The selectable interpolating filters allow lower input data rates while taking advantage of the high DAC update rates. These linear-phase interpolation filters ease reconstruction filter requirements and enhance the passband dynamic performance. Individual offset and gain programmability allow the user to calibrate out local oscillator (LO) feedthrough and sideband suppression errors generated by analog quadrature modulators.

The MAX5893 features a fIM/4 digital image-reject modulator. This modulator generates a quadrature-modulated IF signal that can be presented to an analog I/Q modulator to complete the upconversion process. A second digital modulation mode allows the signal to be frequency-translated with image pairs at fIM/2 or fIM/4.

The MAX5893 features a standard 1.8V CMOS, 3.3V tolerant data input bus for easy interface. A 3.3V SPI™ port is provided for mode configuration. The programmable modes include the selection of 2x/4x/8x interpolating filters, fIM/2, fIM/4 or no digital quadrature modulation with image rejection, channel gain and offset adjustment, and offset binary or two's complement data interface.

Pin-compatible 14- and 16-bit devices are also available. Refer to the MAX5894 data sheet for the 14-bit version and the MAX5895 data sheet for the 16-bit version.

See a parametric table of the complete family of pin-compatible 12-/14-/16-bit high-speed DACs.


  • Analog Quadrature Modulation Architectures
  • Base Stations: 3G UMTS, CDMA, and GSM
  • Broadband Cable Infrastructure
  • Broadband Wireless Transmitters
  • Instrumentation and Automatic Test Equipment (ATE)

Product Lifecycle icon-recommended Production

At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.

Evaluation Kits (6)

Tools & Simulations

IBIS Models

Product Recommendations

MAX5893 Companion Parts

Recommended Related Parts

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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

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