MAX3882A

2.488Gbps 1:4 Demultiplexer with Clock and Data Recovery and Limiting Amplifier

Low-Power 3V, 2.5Gbps/2.7Gbps 1:4 Deserializer with Clock Recovery

Data Sheet (Rev. 2)
Viewing:

Overview

  • No Reference Clock Required for Data Acquisition
  • Serial Input Rate: 2.488Gbps
  • Fully Integrated Clock and Data Recovery with Limiting Amplifier and 1:4 Demultiplexer
  • Parallel Output Rate: 622Mbps
  • Differential Input Range: 10mVP-P to 1.6VP-P without Threshold Adjust
  • Differential Input Range: 50mVP-P to 600mVP-P with Threshold Adjust
  • 0.65UI High-Frequency Jitter Tolerance
  • Loss-of-Lock (Active-Low LOL) Indicator
  • Wide Input Threshold Adjust Range: ±170mV
  • Maintain Valid Clock Output in Absence of Data Transitions
  • System Loopback Input Available for System Diagnostic Testing
  • Operating Temperature Range -40°C to +85°C
  • Low Power Dissipation: 610mW at +3.3V

The MAX3882A is a deserializer combined with clock and data recovery and limiting amplifier ideal for converting 2.488Gbps serial data to 4-bit-wide, 622Mbps parallel data for SDH/SONET applications. The device accepts serial NRZ input data as low as 10mVP-P of 2.488Gbps and generates four parallel LVDS data outputs at 622Mbps. Included is an additional high-speed serial data input for system loopback diagnostic testing. For data acquisition, the MAX3882A does not require an external reference clock. However, if needed, the loopback input can be connected to an external reference clock of 155MHz or 622MHz to maintain a valid clock output in the absence of input data transitions. Additionally, a TTL-compatible loss-of-lock output is provided. The device provides a vertical threshold adjustment to compensate for optical noise generated by EDFAs in WDM transmission systems. The MAX3882A operates from a single +3.3V supply and consumes 610mW.

The MAX3882A's jitter performance exceeds all SDH/SONET specifications. The device is available in a 6mm x 6mm, 36-pin TQFN package.

Applications

  • Add/Drop Multiplexers
  • Digital Cross-Connects
  • DWDM Transmission Systems
  • SDH/SONET Receivers and Regenerators
  • SDH/SONET Test Equipment
MAX3882A
2.488Gbps 1:4 Demultiplexer with Clock and Data Recovery and Limiting Amplifier
MAX3882A: Typical Application Circuit
Add to myAnalog

Add product to the Products section of myAnalog (to receive notifications), to an existing project or to a new project.

Create New Project
Ask a Question

Documentation

Data Sheet 1

Learn More
Add to myAnalog

Add media to the Resources section of myAnalog, to an existing project or to a new project.

Create New Project

Software Resources

Can't find the software or driver you need?

Request a Driver/Software

Hardware Ecosystem

Parts Product Life Cycle Description
Serializer/Deserializer (SerDes) & Gigabit Multimedia Serial Link (GMSL) 3
MAX3892
+3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1 Serializer with Clock Synthesis
MAX3880
+3.3V, 2.488Gbps, SDH/SONET 1:16 Deserializer with Clock Recovery
MAX3890
+3.3V, 2.5Gbps, SDH/SONET 16:1 Serializer with Clock Synthesis and LVDS Inputs
Modal heading
Add to myAnalog

Add product to the Products section of myAnalog (to receive notifications), to an existing project or to a new project.

Create New Project

Latest Discussions

No discussions on MAX3882A yet. Have something to say?

Start a Discussion on EngineerZone®

Recently Viewed