LTM9002

14-Bit, 125Msps Dual-Channel IF/Baseband Receiver Subsystem

NOT RECOMMENDED FOR NEW DESIGNS

64k Point FFT, fIN = 15MHz, –1dBFS, SENSE = VDD, Channel A (LTM9002-LA) slide

64k Point FFT, fIN = 15MHz, –1dBFS, SENSE = VDD, Channel A (LTM9002-LA)

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Features

Integrated Dual 14-Bit, High-Speed ADC, Passive Filters and Fixed Gain Differential Amplifiers
Up to 300MHz IF Range
- Lowpass and Bandpass Filter Versions
Integrated Low Noise, Low Distortion Amplifiers
- Fixed Gain: 8dB, 14dB, 20dB or 26dB
- 50Ω, 200Ω or 400Ω Input Impedance
Integrated Bypass Capacitance, No External Components Required
66dB SNR Up to 140MHz Input (LTM9002-AA)
76dB SFDR Up to 140MHz Input (LTM9002-AA)
Auxiliary 12-Bit DACs for Gain Adjustment
Clock Duty Cycle Stabilizer
Single 3V to 3.3V Supply
Low Power: 1.3W (665mW/ch.)
Shutdown and Nap Modes
15mm × 11.25mm LGA Package

Additional Details

The LTM9002 is a 14-bit dual-channel IF receiver subsystem. Utilizing an integrated system in a package (SiP) technology, it includes a dual high-speed 14-bit A/D converter, matching network, anti-aliasing filter and two low noise, differential amplifiers. It is designed for digitizing wide dynamic range signals with an intermediate frequency (IF) up to 300MHz. The amplifiers allow either AC- or DCcoupled input drive. Lowpass or bandpass filter networks can be implemented with various bandwidths. Contact Analog Devices regarding customization.

The LTM9002 is perfect for demanding communications applications, with AC performance that includes 66dB SNR and 76dB spurious free dynamic range (SFDR). Auxiliary DACs allow gain balancing between channels.

A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.3V logic. An optional multiplexer allows both channels to share a digital output bus. Two single-ended CLK inputs can be driven together or independently. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.

Applications