ADSP-2185M

NOT RECOMMENDED FOR NEW DESIGNS

16-bit, 75 MIPS, 2.5v, 2 serial ports, host port, 80 KB RAM

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Part Details

  • 13.3 ns Instruction Cycle Time @ 2.5 V (Internal), 75 MIPS Sustained Performance
  • Single-Cycle Instruction Execution
  • 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle
  • ADSP-2100 Family Code Compatible (Easy to Use Algebraic Syntax), with Instruction Set Extensions
  • Single-Cycle Context Switch
  • 80K Bytes of On-Chip RAM, Configured as 16K Words Program Memory RAM and 16K Words Data Memory RAM
  • Dual-Purpose Program Memory for Both Instruction and Data Storage
  • See Datasheet for Additional Features
ADSP-2185M
16-bit, 75 MIPS, 2.5v, 2 serial ports, host port, 80 KB RAM
ADSP-2185M Functional Block Diagram
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Documentation

Data Sheet 1

Application Note 61

Processor Manual 4

Software Manual 5

Integrated Circuit Anomaly 1

Legacy Emulator Manual 1

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