The ADRF6602 is a high dynamic range active mixer with integrated phase-locked loop (PLL) and voltage-controlled oscillator (VCO). The PLL/synthesizer uses a fractional-N PLL to generate an f_LO input to the mixer. The reference input can be divided or multiplied and then applied to the PLL phase frequency detector (PFD).

The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter.

The loop filter output is then applied to an integrated VCO. The VCO output at 2× f_LO is applied to an LO divider, as well as to a programmable PLL divider. The programmable PLL divider is controlled by a Σ-Δ modulator (SDM). The modulus of the SDM can be programmed from 1 to 2047.

The active mixer converts the single-ended 50 Ω RF input to a 200 Ω differential IF output. The IF output can operate up to 500 MHz.

The ADRF6602 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, RoHS-compliant, 6 mm × 6 mm LFCSP with an exposed paddle. Performance is specified over the −40°C to +85°C temperature range.

APPLICATIONS

• Cellular base stations