Overview

Features and Benefits

  • Wide input voltage range: 2.75 V to 18 V 
  • Bias input voltage range: 4.5 V to 18 V 
  • Operation up to 150°C junction temperature 
  • PMBus-compatible interface with configurable address 
  • FB1 voltage accuracy (default): −0.62% to +0.69% (−40°C ≤ TJ ≤ +125°C) 
  • Channel 1 and Channel 2: 7 A synchronous buck regulator (9.4 A minimum valley current-limit threshold) 
  • Channel 1 and Channel 2: 14 A output in parallel operation 
  • Channel 3: 3 A synchronous buck regulator (4.2 A minimum valley current-limit threshold) 
  • 8-bit precision DAC for DVS 
    • Adjustable feedback voltage range: 408 mV to 790.5 mV per 1.5 mV step 
    • Upper and lower threshold limit setting 
  • 250 kHz to 2500 kHz adjustable switching frequency range 
  • External compensation for fast load transient response
  • Precision enable pin with 0.615 V accurate threshold
  • Programmable power-up and power-down sequence 
  • Selective active output discharge switch
  • Selective FPWM/PSM mode selection
  • Frequency synchronization input or output 
  • Power-good flag on selective channels
  • UVLO, overcurrent protection, and TSD protection
  • 43-terminal, 5.00 mm × 5.50 mm LGA package

Product Details

The ADP5055 combines three high performance buck regulators in a 43-terminal land grid array (LGA) package to meet demanding performance and board space requirements. The device enables direct connection to high input voltages up to 18 V with no preregulators. All channels integrate both high-side and low-side power metal-oxide semiconductor field effect transistors (MOSFETs) to achieve an efficiency optimized solution. Channel 1 and Channel 2 deliver a programmable output current of 3.5 A or 7 A or provide a single output with up to 14 A of current in parallel operation. Channel 3 delivers a programmable output current of 1.5 A or 3 A.

The switching frequency of the ADP5055 can be programmed or synchronized to an external clock. The ADP5055 contains an enable pin (ENx) on each channel for simple power-up sequencing or adjustable undervoltage lockout (UVLO) threshold.

The ADP5055 integrates a high precision 8-bit digital-to-analog converter (DAC) to enable the output voltage dynamic voltage scaling (DVS) via the PMBus®-compatible, 2-wire interface. The PMBus interface provides other flexible configurations, such as start-up and shutdown sequence control, individual forced pulse-width modulation or power saving mode (FPWM or PSM) selection, an output discharge switch, and a power-good signal.

The ADP5055 is rated at −40°C to +150°C junction temperature.

APPLICATIONS

  • Small cell base stations
  • Field programmable gate array (FPGA) and processor applications
  • Security and surveillance
  • Medical applications

Product Lifecycle icon-recommended Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.