ADGS1612

RECOMMENDED FOR NEW DESIGNS

SPI Interface, 1 Ω RON, ±5 V, 12 V, 5 V, 3.3 V, Mux Configurable, Quad SPST Switch

Part Models
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Part Details

  • SPI interface with error detection
    • Includes CRC, invalid read/write address, and SCLK count error detection
    • Supports burst mode and daisy-chain mode
    • Industry-standard SPI Mode 0 and SPI Mode 3 interface compatible
  • Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations
  • 1 Ω typical on resistance at 25°C
  • 0.23 Ω typical on resistance flatness at 25°C
  • VSS to VDD analog signal range
    • Fully specified at ±5 V, 12 V, 5 V, and 3.3 V
    • ±3.3 V to ±8 V dual-supply operation
    • 3.3 V to 16 V single-supply operation
  • 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
  • 4 mm × 4 mm, 24-lead LFCSP package
ADGS1612
SPI Interface, 1 Ω RON, ±5 V, 12 V, 5 V, 3.3 V, Mux Configurable, Quad SPST Switch
ADGS1612 Functional Block Diagram ADGS1612 Pin Configuration
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Documentation

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Tools & Simulations

LTspice 1


Models for the following parts are available in LTspice:

  • ADGS1612

SPICE Model 1

IBIS Model 1

LTspice

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.


Evaluation Kits

eval board
EVAL-ADGS1612

ADGS1612 Evaluation Board

Features and Benefits

  • SPI interface with error detection
  • Includes CRC, invalid read/write address, and SCLK count error detection
  • Analog supply voltages 
    • Dual-supply: ±3.3 V to ±8 V
    • Single-supply: 3.3 V to 16 V
  • PC control in conjunction with the evaluation software
  • EVAL-SDP-CB1Z SDP

Product Details

The EVAL-ADGS1612SDZ is the evaluation board for the ADGS1612. The ADGS1612 is an iCMOS, quad single-pole, single-throw (SPST) switch controlled by a serial peripheral interface (SPI). The SPI has robust error detection features. These are cyclic redundancy check (CRC) error detection, invalid read/ write address detection, and serial clock (SCLK) count error detection. It is possible to daisy-chain multiple ADGS1612 devices together. This enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS1612 also supports burst mode that decreases the time between SPI commands.

The EVAL-ADGS1612SDZ is controlled by the system demonstration platform (SDP) which connects to a PC via a USB port. The ADGS1612 is on the center of the evaluation board and wire screw terminals are provided to connect to each of the source and drain pins. Three screw terminals power the device and a fourth terminal provides users with a defined digital logic supply voltage, if required. Alternatively, the digital logic supply voltage can be supplied from the SDP.

Full specifications on the ADGS1612 are available in the ADGS1612 data sheet available from Analog Devices, Inc., and should be consulted in conjunction with this user guide when using the evaluation board.

The evaluation board interfaces to the USB port of a PC via the SDP board. The EVAL-SDP-CB1Z board (SDP-B controller board) is available to order on the Analog Devices website at www.analog.com.

EVAL-ADGS1612
ADGS1612 Evaluation Board
EVAL-ADGS1612SDZ (angle) EVAL-ADGS1612SDZ (top) EVAL-ADGS1612SDZ (bottom)

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