ADGS1412

RECOMMENDED FOR NEW DESIGNS

SPI Interface, 1.5 Ω RON, ±15 V/+12 V, Quad SPST Switch, Mux Configurable

Data Sheet (Rev. B) Product Selection Table
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Overview

  • SPI interface with error detection
  • Includes CRC, invalid read/write address, and SCLK count error detection
  • Supports burst mode and daisy-chain mode
  • Industry-standard SPI Mode 0 and Mode 3 interface compatible
  • Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations
  • 1.5 Ω typical on resistance at 25°C
  • 0.3 Ω typical on resistance flatness at 25°C
  • 0.1 Ω typical on resistance match between channels at 25°C
  • VSS to VDD analog signal range
    • Fully specified at ±15 V, ±5 V, and +12 V
  • 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
  • 24-lead LFCSP

The ADGS1412 contains four independent single-pole/single-throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features such as cyclic redundancy check (CRC) error detection, invalid read/write address detection, and SCLK count error detection.

It is possible to daisy-chain multiple ADGS1412 devices together. Daisy-chain mode enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS1412 can also operate in burst mode to decrease the time between SPI commands.

iCMOS construction ensures ultralow power dissipation, making the device ideally suited for portable and battery-powered instruments.

Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.

The on-resistance profile is flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals.

Product Highlights

  1. SPI interface removes the need for parallel conversion, logic traces and reduces general-purpose input/output (GPIO) channel count.
  2. Daisy-chain mode removes additional logic traces when multiple devices are used.
  3. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface.
  4. CRC and error detection capabilities allow the use of the ADGS1412 in safety critical systems.
  5. Guaranteed break-before-make switching allows the use of the ADGS1412 in multiplexer configurations with external wiring.
  6. Minimum distortion.

Applications

  • Automated test equipment
  • Data acquisition systems
  • Battery-powered systems
  • Sample-and-hold systems
  • Audio signal routing
  • Video signal routing
  • Communications systems
  • Relay replacement
ADGS1412
SPI Interface, 1.5 Ω RON, ±15 V/+12 V, Quad SPST Switch, Mux Configurable
ADGS1412 Functional Block Diagram ADGS1412 Pin Configuration
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Documentation

Data Sheet 1

User Guide 1

Application Note 1

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Software Resources

Device Drivers 1

Tools & Simulations

LTspice

Models for the following parts are available in LTspice:

  • ADGS1412

IBIS Model 1

SPICE Model 1

LTspice

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

Evaluation Kits

eval board
schematic 1
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schematic 3
EVAL-24LFCSPEBZ

Evaluation Board for the 24-Lead LFCSP Devices in the Switches and Multiplexers Portfolio

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Features and Benefits

  • 24-lead, 4 mm × 4 mm LFCSP evaluation board
  • Easily changeable socket for the main device
  • Gold pin connectors for the addition of passive components
  • SMB connectors for the input and output of signals
  • Additional space on board for prototyping

Product Details

The EVAL-24LFCSPEBZ enables easy evaluation of the 24-lead lead frame chip scale package (LFCSP) devices in the Switches and Multiplexers Portfolio portfolio that are purchased separately. The EVAL-24LFCSPEBZ is supplied with a socket to secure a 24-lead LFCSP device to the evaluation board without the need for soldering. In addition, there are three sets of gold pin connectors in each trace, allowing board flexibility and reusability for multiple evaluations.

Figure 1 shows the EVAL-24LFCSPEBZ. A 24-lead LFCSP device can be inserted into the socket in the center of the evaluation board. Each device pin has a corresponding 3-pin header link, from K1 to K24, that can either be connected to an external signal source by removing the corresponding link or by using the link to choose between VDD or GND. A wire screw terminal, J1, supplies the VDD and GND. The Subminiature Version B (SMB) connectors on the EVAL-24LFCSPEBZ allow additional external signals to be supplied to the device. In addition, there is a perfboard space and two 24-lead LFCSP pads (4 mm × 4 mm) available on top of the EVAL-24LFCSPEBZ for prototyping.

The full specifications of the device under test (DUT) are available in the corresponding product data sheet, which must be consulted with the EVAL-24LFCSPEBZ user guide when using the EVAL-24LFCSPEBZ.

eval board
schematic 4
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schematic 6
EVAL-ADGS1412

ADGS1412 Evaluation Board 

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Features and Benefits

  • SPI interface with error detection 
  • Includes CRC, invalid read/write address and SCLK count error detection 
  • Analog supply voltages 
    • Dual-supply: ±4.5 V to ±16.5 V 
    • Single-supply: 5 V to 20 V 
  • PC control in conjunction with the evaluation software EVAL-SDP-CB1Z system demonstration platform (SDP) 

Product Details

The EVAL-ADGS1412SDZ is the evaluation board for the ADGS1412. The ADGS1412 is an iCMOS, quad single-pole, single-throw (SPST) switch controlled by a serial peripheral interface (SPI). The SPI has robust error detection features. These are cyclic redundancy check (CRC) error detection, invalid read/write address detection and serial clock (SCLK) count error detection. It is possible to daisy-chain multiple ADGS1412 devices together. This enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS1412 also supports burst mode that decreases the time between SPI commands.


The EVAL-ADGS1412SDZ is controlled by the SDP which connects to a PC via USB. The ADGS1412 is on the center of the evaluation board, and wire screw terminals are provided to connect to each of the source and drain pins. Three screw terminals power the device and a fourth terminal provides users defined digital logic supply voltage, if required. Alternatively, the digital logic supply voltage can be supplied from the SDP.


Full specifications on the ADGS1412 are available in the ADGS1412 data sheet available from Analog Devices and should be consulted in conjunction with user guide UG-1067 when using the evaluation board.


The evaluation board interfaces to the USB port of a PC via the SDP board. The EVAL-SDP-CB1Z board (SDP-B controller board) is available to order on the Analog Devices website at www.analog.com.
EVAL-24LFCSPEBZ
Evaluation Board for the 24-Lead LFCSP Devices in the Switches and Multiplexers Portfolio
EVAL-24LFCSPEBZ Board Photo Angle View EVAL-24LFCSPEBZ Board Photo Top View EVAL-24LFCSPEBZ Board Photo Bottom View
EVAL-ADGS1412
ADGS1412 Evaluation Board 
EVAL-ADGS1412SDZANGLE-web EVAL-ADGS1412SDZBOTTOM-web EVAL-ADGS1412SDZTOP-web

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