AD9517-3
RECOMMENDED FOR NEW DESIGNS12-Output Clock Generator with Integrated 2.0 GHz VCO
- Part Models
- 4
- 1ku List Price
- Starting From $8.60
Part Details
- Low phase noise, phase-locked loop (PLL)
- On-chip VCO tunes from 1.75 GHz to 2.25 GHz
- External VCO/VCXO to 2.4 GHz optional
- 1 differential or 2 single-ended reference inputs Reference monitoring capability
- Automatic revertive and manual reference
- switchover/holdover modes
- Accepts LVPECL, LVDS, or CMOS references to 250 MHz Programmable delays in path to PFD
- Digital or analog lock detect, selectable
- Automatic synchronization of all outputs on power-up
- Manual output synchronization available
- Available in a 48-lead LFCSP
- 2 pairs of 1.6 GHz LVPECL outputs
- Each output pair shares a 1-to-32 divider with coarse phase delay
- Additive output jitter: 225 fs rms
- Channel-to-channel skew paired outputs of <10 ps
- 2 pairs of 800 MHz LVDS clock outputs
- Each output pair shares two cascaded 1-to-32 dividers with coarse phase delay
- Additive output jitter: 275 fs rms
- Fine delay adjust (Δt) on each LVDS output
- Each LVDS output can be reconfigured as two 250 MHz CMOS outputs
The AD9517-31 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.75 GHz to 2.25 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.
The AD9517-3 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.
The AD9517-3 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.
For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs.
Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.
The AD9517-3 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).
The AD9517-3 is specified for operation over the industrial range of −40°C to +85°C.
APPLICATIONS
- Low jitter, low phase noise clock distribution
- 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
- Forward error correction (G.710)
- Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
- High performance wireless transceivers
- ATE and high performance instrumentation
1 AD9517 is used throughout to refer to all the members of the AD9517 family. However, when AD9517-3 is used, it is referring to that specific member of the AD9517 family.
Documentation
Data Sheet 1
User Guide 1
Application Note 10
Technical Articles 6
Evaluation Design File 4
Frequently Asked Question 1
Device Drivers 2
Product Selection Guide 1
Rarely Asked Question Page 12
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
AD9517-3ABCPZ | 48-Lead LFCSP (7mm x 7mm x 0.85mm w/ EP) | ||
AD9517-3ABCPZ-RL7 | 48-Lead LFCSP (7mm x 7mm x 0.85mm w/ EP) | ||
AD9517-3BCPZ | 48-Lead LFCSP (7mm x 7mm w/ EP) | ||
AD9517-3BCPZ-REEL7 | 48-Lead LFCSP (7mm x 7mm w/ EP) |
Part Models | Product Lifecycle | PCN |
---|---|---|
No Match Found | ||
Jun 9, 2021 - 20_0126 Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea |
||
AD9517-3ABCPZ | PRODUCTION | |
AD9517-3ABCPZ-RL7 | PRODUCTION | |
Sep 13, 2017 - 16_0077 CANCELLED: Conversion of Select 4x4, 5x5, 6x6 and 7x7mm LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to ASE Korea. |
||
AD9517-3ABCPZ | PRODUCTION | |
AD9517-3ABCPZ-RL7 | PRODUCTION | |
Aug 21, 2009 - 09_0156 Moisture Sensitivity Level (MSL) change for select devices packaged in 7x7mm, 8x8mm, and 9x9mm LFCSP packages. Introduction of new models on all affected devices indicated by a revision letter in the model part number. |
||
AD9517-3BCPZ | Obsolete | |
AD9517-3BCPZ-REEL7 | Obsolete | |
Mar 12, 2010 - 10_0031 Discontinuation and replacement of select models of generics as listed herein. |
||
AD9517-3BCPZ | Obsolete | |
AD9517-3BCPZ-REEL7 | Obsolete |
This is the most up-to-date revision of the Data Sheet.
Software Resources
Device Drivers 2
Evaluation Software 0
Hardware Ecosystem
Tools & Simulations
AD9517-x IBIS Models 1
ADIsimCLK Design and Evaluation Software
ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
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