Features and Benefits
RF frequency range: 24 GHz to 29.5 GHz
- 16 configurable transmit channels
- 16 configurable receive channels
- Fast TDD switching time using external pins
- Matched, 50 Ω, single-ended RF inputs and outputs
- Integrated transmitter power detectors and temperature sensor
- High resolution, 6-bit vector modulators for phase control
- High resolution, 6-bit and 5-bit DVGAs for amplitude control
- Gain compensation over temperature
- Memory for 256 beam positions
- Single power supply required: 3.3 V with on-chip LDO for 1.8 V
- Adjustable power modes for power consumption reduction
- 3-wire or 4-wire SPI supporting up to a 61.44 MHz SPI clock speed
- 72-lead, 10 mm × 10 mm, microwave LGA package
The ADMV4801 is a silicon germanium (SiGe), 24 GHz to 29.5 GHz, mmW, 5G beamformer. This RF IC is highly integrated and contains 16 independent transmit and receive channels. In transmit mode, the RFC input signal is split using 1:16 power splitters and passes through the 16 independent transmit channels. In receive mode, input signals pass through the 16 independent channels and are combined with 16:1 combiners to the RFC pin. In transmit mode, each channel includes a vector modulator (VM) to control phase and two digital variable gain amplifiers (DVGAs) to control amplitude. In receive mode, each channel includes a VM to control phase and a DVGA to control amplitude. The VM provides a full 360° phase adjustment range in either transmit or receive mode, providing 6 bits of resolution for 5.625° phase steps. The total DVGA dynamic range adjustment range in transmit mode is 34 dB, providing 6 bits of resolution, resulting in 0.5 dB amplitude steps, and 5 bits of resolution, resulting in 1 dB amplitude steps. In receive model the total dynamic range is 17 dB providing, 6 bits of resolution, resulting in 0.5 dB amplitude steps. The DVGAs provide a flat phase response across the full gain range. The transmit channels contain individual power detectors to provide the ability to detect and calibrate each channel gain, as well as channel to channel gain mismatch. The ADMV4801 RF ports can be connected directly to a patch antenna to create a dual polarization, mmW, 5G subarray.
The programming of the ADMV4801 can be accomplished using the 3-wire or 4-wire serial port interface (SPI). An integrated, onchip low dropout regulator (LDO) generates the 1.8 V supply for the SPI circuitry to reduce the number of required supply domains. Various SPI modes are available to enable fast startup and control during normal operation. The amplitude and phase for each channel can be set individually, or multiple channels can be programmed simultaneously using the on-chip memory for beamforming. The on-chip memory can store up to 256 beam positions, which can be allocated for either transmit or receive mode. A dedicated load pin provides synchronization of all devices in the same array. A transmit and receive mode control pin is provided for fast switching between transmit and receive mode.
The ADMV4801 is featured in a compact, thermally enhanced, 10 mm × 10 mm, RoHS compliant land grid array (LGA) package. The ADMV4801 operates over the −40°C to +95°C case temperature range. This LGA package enables the ability to heat-sink the ADMV4801 from the topside of the package for the most efficient thermal heat-sinking and to allow flexible antenna placement on the opposite side of the printed circuit board (PCB).
Throughout the figures in the data sheet, Tx means transmit (or transmitter) and Rx means receive (or receiver).
Additional digital details of ADMV4801 are available in AN-2021 Application Note, ADMV4801 SPI Application Note. Contact Analog Devices at mmWave5G@analog.com.
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
The ADMV4801-EVALZ evaluation board incorporates the ADMV4801 silicon germanium (SiGe), 24 GHz to 29.5 GHz, 5G beamformer with low dropout (LDO) regulators, level shifters, and an EVAL-SDP-CS1Z (SDP-S) controller board to allow the simplified and efficient evaluation of the ADMV4801. The RF IC is highly integrated and contains 16 independent transmitter and receiver channels. The chip can be programmed using a 4‑wire serial port interface (SPI). The SDP-S controller allows the user to interface with the ADMV4801 SPI through the Analog Devices, Inc., Analysis, Control Evaluation (ACE) software. The level shifters translate the 1.8 V chip logic level to the 3.3 V SDP-S logic level. The LDO regulators allow the ADMV4801 to be powered on by a single supply.
For full details on the ADMV4801, see the ADMV4801 data sheet, which must be consulted in conjunction with the user guide when using the ADMV4801-EVALZ.
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