AD9684
14-Bit, 500 MSPS LVDS, Dual Analog-to-Digital Converter
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Features
- LVDS digital outputs
- 1.1 W total power per channel at 500MSPS (default settings)
- SFDR = 85 dBc at 170MHz fIN (500MSPS)
- SNR = 68.6 dBFS at 170MHz fIN (500MSPS)
- ENOB = 10.9 bits at 170 MHz fIN
- DNL = ±0.5 LSB
- INL = ±2.5 LSB
- Noise Density = -153 dBFS/Hz at 500 MSPS
- 1.25V, 2.50 V and 3.3V supply operation
- No missing codes
- Internal analog-to-digital converter (ADC) voltage reference
- See data sheet for additional features
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The AD9684 is a dual, 14-bit, 500 MSPS ADC. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed for sampling wide bandwidth analog signals. The AD9684 is optimized for wide input bandwidth, a high sampling rate, excellent linearity, and low power in a small package.
The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth buffered inputs, supporting a variety of user selectable input ranges. An integrated voltage reference eases design considerations. Each ADC data output is internally connected to an optional decimate by 2 block.
The analog input and clock signals are differential inputs. Each ADC data output is internally connected to two digital downconverters (DDCs). Each DDC consists of four cascaded signal processing stages: a 12-bit frequency translator (NCO), and three half-band decimation filters supporting a divide by factor of two, four, and eight.
Applications
- Communications
- Diversity multi-band, multi-mode digital receivers
3G/4G, TD-SCDMA, WCDMA, MC-GSM, LTE - General-purpose software radios
- Ultrawideband satellite receiver
- Instrumentation (spectrum analyzers, network analyzers, integrated RF test solutions)
- Radar
- Digital oscilloscopes
- High speed data acquisition systems
- DOCSIS CMTS upstream receive paths
- HFC digital reverse path receivers
Ask a Question
Submit your question below and we will return the best answer from ADI’s knowledge database:
Search
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Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
Visit the ADI Support Page
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AD9684
Documentation
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Device Drivers 1
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Rarely Asked Question Page 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9684BBPZ-500 |
196-Ball BGA (12mm x 12mm x 1.38mm w/ EP)
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| AD9684BBPZRL-500 |
196-Ball BGA (12mm x 12mm x 1.38mm w/ EP)
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| AD9684BBPZRL7-1500 | BGA THERM ENH W/ HEATSINK |
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- AD9684BBPZ-500
- Pin/Package Drawing
-
196-Ball BGA (12mm x 12mm x 1.38mm w/ EP)
- Documentation
-
HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
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SamacSys
- AD9684BBPZRL-500
- Pin/Package Drawing
-
196-Ball BGA (12mm x 12mm x 1.38mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9684BBPZRL7-1500
- Pin/Package Drawing
- BGA THERM ENH W/ HEATSINK
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
Software & Part Ecosystem
Device Drivers
Looking for Evaluation Software? You can find it here
| Parts | Product Life Cycle | Description | ||
|---|---|---|---|---|
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Clock Distribution Devices1 |
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LAST TIME BUY |
Ultralow Jitter, 7.5GHz, 11 Output Fanout Buffer Family |
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Clock Generation Devices1 |
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RECOMMENDED FOR NEW DESIGNS |
JESD204B/JESD204C Clock Generator with 14 LVDS/HSTL Outputs |
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Digital Control VGAs1 |
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RECOMMENDED FOR NEW DESIGNS |
Low Distortion, 3.2 GHz, RF DGA |
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Fully Differential Amplifiers1 |
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RECOMMENDED FOR NEW DESIGNS |
6 GHz Ultrahigh Dynamic Range Differential Amplifier |
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Internal Power Switch Buck Regulators2 |
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RECOMMENDED FOR NEW DESIGNS |
6.5V, 4 A, High Efficiency, Step-Down DC-to-DC Regulator |
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RECOMMENDED FOR NEW DESIGNS |
20 V, 4 A, Synchronous Step-Down DC-to-DC Regulator |
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Positive Linear Regulators (LDO)1 |
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PRODUCTION |
2 A, Low VIN, Dropout, CMOS Linear Regulator |
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Can't find the software or driver you need?
Request a Driver/SoftwareEvaluation Kits 2
EVAL-AD9684
AD9684 Evaluation Board
Product Detail
The AD9684-500EBZ is an evaluation board for the AD9684, dual, 14-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations. It is designed to interface directly with the HSC-ADC-EVALEZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device’s hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPIController software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9684.
The AD9684 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and VisualAnalog and SPIController are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeedproductssupport@analog.com.
Resources
HSC-ADC-EVALEZ
FPGA Based Data Capture Kit
Product Detail
