Product Details

The ADRF5044-EVALZ is a 4-layer evaluation board. Each copper layer is 0.7 mil (0.5 oz) and separated by dielectric materials. Shown Figure 5 is the stackup for this evaluation board.

All RF and dc traces are routed on the top copper layer whereas the inner and bottom layers are grounded planes that provide a solid ground for the RF transmission lines. Top dielectric material is 8 mil Rogers RO4003, offering optimal high frequency performance. The middle and bottom dielectric materials provide mechanical strength. The overall board thickness is 62 mil, which allows 2.4 mm RF launchers to be connected at the board edges.

The RF transmission lines were designed using a coplanar waveguide (CPWG) model, with trace width of 14 mil and ground clearance of 5 mil to have a characteristic impedance of 50 Ω. For optimal RF and thermal grounding, as many plated through vias as possible are arranged around transmission lines and under the exposed pad of the package.

Figure 7 shows the actual ADRF5044 evaluation board with component placement. Two power supply ports are connected to the VDD and VSS test points, TP1 and TP4, control voltages are connected to the V1 and V2 test points, TP2 and TP3, and the ground reference is connected to the GND test point, TP5.

On the control traces, V1 and V2, a 0 Ohm resistor is used to connect the test points to the pins on the part. On the supply traces, VDD and VSS, a 100 pF bypass capacitor is used to filter high frequency noise. Additionally, unpopulated components positions are available for applying extra bypass capacitors.

The RF input and output ports (RFC, RF1, RF2, RF3, and RF4) are connected through 50 Ω transmission lines to the 2.4 mm RF launchers, J1 to J5. These high frequency RF launchers are by contact and not soldered onto the board. A thru calibration line connects the unpopulated J6 and J7 launchers; this transmission line is used to estimate the loss of the PCB over the environmental conditions being evaluated.

The schematic of the ADRF5044 evaluation board is shown in Figure 8.


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