AD9213S

RECOMMENDED FOR NEW DESIGNS

12-Bit, 10.25 GSPS, JESD204B, RF Analog-to-Digital Converter

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Overview

  • Low power dissipation: <4.6 W typical at 10 GSPS
  • Integrated input buffer (6.5 GHz input bandwidth)
    • 1.4 V p-p full-scale analog input with RIN = 50 Ω
    • Overvoltage protection
  • High instantaneous dynamic range
  • NSD
    • −155.1 dBFS/Hz at 10 GSPS with −9 dBFS, 170 MHz input
    • −153 dBFS/Hz at 10 GSPS with −1 dBFS, 170 MHz input
  • SFDR: 70 dBFS at 10 GSPS with −1 dBFS, 1000 MHz input
  • SFDR excluding H2 and H3 (worst other spur): −89 dBFS at 10 GSPS with −1 dBFS, 1000 MHz input
  • 16-lane JESD204B output (up to 16 Gbps line rate)
  • Multichip synchronization capable with 1 sample accuracy
    • DDC NCO synchronization included
  • Integrated DDC
    • Selectable decimation factors
    • 16 profile settings for fast frequency hopping
  • Fast overrange detection for efficient AGC
  • On-chip temperature sensor
  • On-chip negative voltage generators
  • Low CER: <1 × 10−16
  • 12 mm × 12 mm, 192-ball BGA-ED package

Commercial Space Features

  • Supports aerospace applications
  • Certificate of conformance
  • Wafer diffusion lot traceability
  • Qualification based on flows per NASA PEM-INST-001 and SAE AS6294
  • Burn-in, life test, and deltas analysis
  • Radiation lot acceptance test (RLAT)
    • Total ionizing dose (TID)
  • Radiation benchmark
    • No single event latchup (SEL) occurs at effective linear energy transfer (LET): ≤87 MeV-cm2 /mg
  • Outgassing characterization

The AD9213S-CSH is a single, 12-bit, 10.25 GSPS, RF analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. The AD9213S-CSH supports high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low conversion error rates (CERs). The AD9213S-CSH features a 16-lane JESD204B interface to support maximum bandwidth capability.

The AD9213S-CSH achieves dynamic range and linearity performance while consuming <4.6 W typical. The device is based on an interleaved pipeline architecture and features a proprietary calibration and randomization technique that suppresses interleaving spurious artifacts into its noise floor. The linearity performance of the AD9213S-CSH is preserved by a combination of on-chip dithering and calibration, which results in excellent spurious-free performance over a wide range of input signal conditions.

Applications that require less instantaneous bandwidth can benefit from the on-chip, digital signal processing (DSP) capability of the AD9213S-CSH that reduces the output data rate along with the number of JESD204B lanes required to support the device. The DSP path includes a digital downconverter (DDC) with a 48-bit, numerically controlled oscillator (NCO), followed by an in-phase/ quadrature (I/Q) digital decimator stage that allows selectable decimation rates that are factors of two or three. For fast frequency hopping applications, the AD9213S-CSH NCO supports up to 16 profile settings with a separate trigger input, allowing wide surveillance frequency coverage at a reduced JESD204B lane count.

The AD9213S-CSH supports sample accurate multichip synchronization that includes synchronization of the NCOs. The AD9213S-CSH is offered in a 12 mm × 12 mm, 192-ball ball grid array (BGA) package and is specified over a junction temperature range of −20°C to +115°C. Additional application and technical information can be found in the Commercial Space Products Program brochure and the AD9213 data sheet.

APPLICATIONS

  • Low and medium earth orbit (LEO/MEO) satellites
  • Geosynchronous earth orbit (GEO) satellites
  • Avionics
  • Ultrawideband satellite receiver

AD9213S
12-Bit, 10.25 GSPS, JESD204B, RF Analog-to-Digital Converter
AD9213S-CSH Functional Block Diagram AD9213S-CSH Pin Configuration
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Tools & Simulations

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Evaluation Kits

eval board
EVAL-AD9213

AD9213 Evaluation Board

Features and Benefits

  • Full featured evaluation board for the AD9213 device family.
  • Wide band Balun driven input.
  • No external supply needed. Uses 12V-1A and 3.3V-3A supplies from FMC+ connector on ADS8-V1EBZ FPGA data capture card.
  • Single software interface for device control and analysis through ACE.

Product Details

The AD9213-10GEBZ and AD9213-6GEBZ supports the 10Gsps and 6Gsps models of the AD9213. The AD9213 is a single 12-bit, 10.25 GSPS RF analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. It has been optimized to support high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low code error rates (CER). The AD9213 features a 16-lane JESD204B interface to support its maximum bandwidth capability.

This Preliminary Evaluation design provides all of the support circuitry required to operate the ADC in its various modes and configurations. It is designed to interface directly with the ADS8-V1EBZ FPGA-based data capture card, allowing users to download captured data for analysis. The device control and subsequent data analysis can be performed using the ACE software package.

EVAL-AD9213
AD9213 Evaluation Board
EVAL-AD9213-10GEBZ-B (Angle View) EVAL-AD9213-10GEBZ-B (Top View) EVAL-AD9213-10GEBZ-B (Bottom View) AD9213-6GEBZ Evaluation Board AD9213-6GEBZ Evaluation Board - Bottom View AD9213-6GEBZ Evaluation Board - Top View

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