Recently, I sent out a circuit prototype for testing at a certification lab. After a few days I called to see how it was going and discovered that testing was delayed. They did not have an electronic load with which to conduct the tests. While electronic loads (we call them “load boxes”) are a common sight in any lab, there was no way I was going to risk loaning an expensive piece of test equipment to an outside lab, nor was I willing to pay for the certification lab to rent a commonplace piece of equipment.

Commercial electronic loads often lack key features, so our labs are populated with a lot of “homebrew” load boxes. I decided to modify one I built and send it to the certification lab. Here are the key features:

• Fixed 3A constant current load (it sinks from a positive supply)
• Under voltage lockout (UVLO) set to 6.7V
• Self-powered (needs no batteries or on/off switch)

 

 

The schematic is shown below. Pass devices Q3 and Q4 carry the 3A load. Op amp U1b adjusts the gate drive to maintain a constant voltage (3V) across the resistor stacks (R8 and R9 average the result). Given that the voltage across the resistor stacks is constant, the current drawn by Q3 and Q4 is also constant, about 3.2A in this case. The resistor stacks serve a second purpose: they ballast the current flow in Q3 and Q4 to help them share equally.

 

 

The opamp, an LT1635, also contains a buffered 200mV reference (U1a) which is amplified to obtain 3V. I trimmed the output current to 3A by adding 2MΩ across R6. If you want to make a fully adjustable load box, add a 1MΩ log taper pot or 10-turn 100kΩ pot between U1a and U1b.

R12 and R13 (10Ω) are absolutely necessary to prevent parasitic, high frequency oscillations in the MOSFETs. They are located at the MOSFETs themselves, attached directly to the gate leads. R10 and R11 (10kΩ) isolate U1b’s output from high gate capacitance of the MOSFETs, and from the long leads I have between the op amp circuit and my heat sink assemblies.

This load box is basically a two terminal device with banana jacks for + and –; there is nothing to prevent a reverse connection which would essentially short the external DUT. To protect against this I added D3, D4 and D5.

Q1 and Q2 form a simple UVLO circuit. UVLO is recommended for two reasons. First, we’ve all had the experience of the load box that, presented with no voltage, winds up and drives its pass devices full on. Then when power is finally applied, the load box acts like a short circuit for several hundred milliseconds while the loop tries to correct its error. More sophisticated load boxes incorporate a UVLO circuit to disengage the loop when the input voltage collapses below a certain point. Second, since this circuit is self-powered, the available gate drive is no better than the input voltage, and it is not necessarily possible to flow 3A with an input of less than 7V. I have set the UVLO threshold to 7.2V to at once eliminate both the loop wind up problem and unpredictable declining output current at low input voltages.

Need I mention that 12V × 3A = 36W, and that 36W concentrated in two small MOSFET packages generates a high temperature rise? The MOSFETs must be assembled on heat sinks. My heat sinks were too small for 36W (remember this load box was re-purposed), so for continuous use by the calibration lab I directed a muffin fan at them. If you don’t want to do any calculations or add fans, look for a finned heat sink that measures about 2” × 6”. Orient the fins vertically to promote convection currents and don’t cover them up with paperwork and other test equipment. Not all the heat is dissipated by Q3 and Q4; D4 and D5 collectively dissipate ~3W, R14-21 dissipate a total of 8W. So in reality Q3 and Q4 dissipate about 25W total, with 12V input.