CN0581

USB-C OVERVIEW

USB-C supports high data rates and increased power delivery between electronic devices. It can transfer data as fast as 10 Gbps, while delivering up to 3 A with 5 V (15 W) over standard cables using the basic configuration channel (CC) detection. The USB-C PD 3.0 specification extends operation up to 5 A and 20 V (100 W). By default, a standard USB-C power source provides 5 V at 3 A, although some noncompliant sources may have lower current capability.

The USB-C specification requires a device to negotiate to be either a power provider (source) or power user (sink) before power transfer takes place. The sink can request a higher voltage and inform the source of its current requirements through the PD negotiation process. If the source can meet the sink's requirements, the source's output voltage is set accordingly. These power levels satisfy the requirement of many portable electronic devices, hence the increasing adoption of USB Type-C for charging and general power delivery. The CN0581 allows the user to set the minimum and maximum bus voltage (VBUS), along with the maximum required operating current using the on-board DIP switches. The following PDOs are supported on the CN0581:

• 5 V, 9 V, 12 V, 15 V — up to 3 A
• 20 V — up to 5 A

Cables, Connectors, and Power Sources

The plugs at both ends of a Type-C cable are identical, allowing for reversible plug-in. Each connector is also reversible, which allows it to be plugged in without worrying about polarity. USB-C cables vary in quality and current carrying capability, a standard cable can typically accommodate bus power up to 60 W at 3 A. In order to achieve 100 W at 5 A, an electronically marked or active cable is required, so be sure that the cable being used is rated for the load current being negotiated. Figure 2 shows the CN0581 plug and receptacle pin configurations.

The USB power source specifications must be interpreted before use in a given application. Not all power sources provide an intuitive combination of voltages and currents. For example, a high-power laptop charger may provide 20 V at 6.5 A (above the official USB-C standard), 5 V at only 1 A (below the standard), and no support for 9 V or 12 V, as compared to a general-purpose 45 W adapter which may provide 5 V, 9 V, 12 V, and 15 V at 3 A (adheres to the USB-C standard) and 20 V at 2.25 A (below the standard). So it is important to validate the USB-C power sources capabilities when connecting a USB-C sink device negotiating for a particular power level.

USB TYPE-C CC DETECTION AND PD MESSAGING

The core of the CN0581 is the MAX77958 standalone USB Type-C and USB power delivery controller.

This device detects connected sources or sinks by first using USB Type-C CC detection, followed by power delivery protocol using USB PD messaging. The MAX77958 protects against overvoltage and overcurrent, detects moisture, and prevents corrosion on the USB Type-C connector. It is compliant with USB Type-C Version 1.3 and PD 3.0, but also has a D+/D- USB switch and battery charging (BC) 1.2 detection to support legacy USB standards.

The CC detection process detects cable presence, orientation, as well as power role and current requirements for the initial 5 V supply voltage. CC detection is new to USB version 1.3 when compared to the legacy USB-C standard in which 5 V is available without any detection. Cable detection occurs when one of the two CC lines is pulled up or pulled down; a device configured as a sink has the CC lines pulled down, whereas a device configured as a source has the CC lines pulled up. The voltage level detected on the CC1 and CC2 lines determines the cable orientation, as well as the source current capability. Table 1 shows the different CC detection configurations. After CC detection, the PD negotiation process continues. If there are multiple valid PDO combinations, the highest power source PDO is requested.

Another feature of USB-C is cold-plugging, namely the VBUS voltage is provided only after successful end-to-end detection is completed. This feature makes CC detection mandatory in USBC applications, and the MAX77958 transparently handles all coldplugging and CC operations.

The CN0581 uses the MAX77958 in sink mode to determine the capabilities of the connected source device and optimize power into the surge stopper/ideal diode circuit, as shown in Figure 3.

The MAX77958 has an I²C controller interface that can be pre-programmed with custom firmware to read and write to other devices in the system autonomously without assistance from the application processor. The interrupt output pin can report USB-C PD events and status changes. For systems controlled by an application processor, the device also has with a separate I²C peripheral interface through which the system can read/write and configure internal registers. The MAX77958 has nine configurable GPIOs that can be used for detection, as interrupts, as the enable/disable pin for external devices, or as ADC inputs.

PDO Selection

The PDO minimum voltage, maximum voltage, and current requirement are set through DIP switches (Table 2 and Table 3, respectively). Each DIP switch has an open solder blob jumper in parallel such that the board may be configured permanently.

Ten switches are required to select all modes, but the MAX77958 has only seven GPIOs remaining for this function. A MAX4701 dual double pole/double throw (DPDT) switch is used to multiplex the DIP switch signals, as shown in Figure 4. The custom firmware programmed into the CN0581 sequences through all switches and sets the PDO modes accordingly.

The multiplexing switch can be configured in several different configurations for 5 A operating current. For a complete list, visit the CN0581 User Guide.

SURGE STOPPER WITH IDEAL DIODE

With USB Type-C comes new challenges in system protection. While PD negotiation and the single, standardized, reversible connector mitigate several mechanical and cable fault conditions, an LTC4364-2 hot-swap and ideal diode controller provides protection from high power fault conditions, along with robust power-up into large bulk bypass capacitors.

The surge stopper section of the circuit consisting of Q1, driven by the LTC4364-2's HGATE control pin, provides several functions. It qualifies the input voltage, only turning on when the input voltage is between 3.5 V and 21.8 V. Once this condition is met, the HGATE current source is enabled, ramping the output voltage into up to 1000 μF of bulk bypass capacitance.

Q2, driven by the LTC4364-2's DGATE pin, functions as an ideal diode, preventing reverse current flow in the event the output voltage rises above the USB-C source's voltage due to a fault condition in the power sink circuit, as may occur if the circuit can accept power from multiple sources. Figure 5 shows the surge stopper designed around LTC4364-2 surge stopper with ideal diode control.

Overcurrent Fault

The LTC4364-2 features an adjustable current limit that protects against excessive load current and short circuits. During an overcurrent event, the HGATE pin of LTC4364 is reduced to limit the voltage across the 7 mΩ sense resistor between the SENSE and OUT pins to 50 mV, corresponding to 7.1 A nominal. Upon entering current limit, a current begins charging the 22 nF TMR capacitor according to Equation 1:

where:
I_TMR is the TMR pin current.
USB_VBUS_RAW is the voltage input from the USB-C source.
VBUS_OUT is the voltage output from the LTC4364-2.

The timer expires when the capacitor voltage reaches 1.35 V, after which HGATE is pulled low, turning Q1 off. This corresponds to a time of approximately 3 ms when first entering current limit, dropping to 400 μs if a 20 V VBUS_OUT is short-circuited. After the overcurrent fault condition has been removed and a cool down period has transpired, the HGATE pin is allowed to pull back up and turn on Q1.

Input Overvoltage Fault

At power-up, if the LTC4364-2 OV pin voltage is higher than its 1.25 V threshold before the 100 μs internal power-on-reset expires, or before the input undervoltage condition is cleared at the LTC4354-2 UV pin, the HGATE pin will be held low until the OV pin voltage drops below its threshold. The nominal value set for the CN0581 input overvoltage fault is 21.8 V.

Input Undervoltage Fault

When the voltage at the LTC4364-2 UV pin is below its 1.25 V threshold, the surge stopper is off. Once the UV pin voltage rises above the UV threshold plus the UV hysteresis (50 mV nominal), the HGATE pin is allowed to pull up without going through a timer cycle. The nominal value set for the CN0581 input undervoltage fault is 3.5 V.

Output Overvoltage Fault

The LTC4364-2 limits the voltage at the OUT pin during an output overvoltage fault. If the voltage at VBUS_OUT is higher than 24.5 V, set by the FB pin resistors; for longer than the timeout period set by the timer capacitor, an output overvoltage fault is detected, and the surge stopper turns off. After the output overvoltage fault condition has been removed and a cool down period has transpired, the surge stopper of LTC4364-2 turns on again.

POWER ARCHITECTURE

Figure 6 shows the complete power architecture of the CN0581. An ADP7142 provides a regulated 3.3 V for the system I/O voltage (VIO), which sets the GPIO and I²C bus logic levels.

The total power loss measured on the board at 20 V with a 5 A load is less than 1 W, and the voltage drop across the ideal diode is about 0.16 Ω at the same load of 5 A.