概览
优势和特点
- 40MHz（指令速率：25ns）SISD SHARC内核
- 峰值性能：120MFLOP
- 与所有SHARC处理器代码兼容
- 支持IEEE兼容32位浮点、40位浮点和32位定点数学运算
- 2Mb片内双端口SRAM
- 无缝连接，实现可扩展DSP多处理
- 6个链路端口，全面支持点到点连接和阵列多处理
- 2个同步串行端口，具有独立的发射和接收功能
- 10通道DMA控制器
- 主机处理器接口
产品详情
ADSP-21062和ADSP-21060 SHARC DSP是具有新型功能和更强性能的信号处理微电脑。ADSP-2106x SHARC为针对高性能DSP应用而优化的32位处理器。ADSP-2106x基于ADSP-21000 DSP内核，形成一种完整的片上系统，增添了一个双端口片内SRAM和由专用I/O总线支持的集成I/O外设。
ADSP-2106x以高速、低功耗CMOS工艺制成，指令周期时间为25 ns，工作速率为40 MIPS。借助片内指令缓存，该处理器可以在单个周期内执行每条指令。
ADSP-2106x SHARC DSP代表着信号计算机领域新的集成标准，结合了高性能浮点DSP内核和集成式片内系统功能，包括4 Mb SRAM存储器（ADSP-21062为2 Mb，ADSP-21061为1 Mb）、主机处理器接口、DMA控制器、串行端口和链路端口，并为无缝DSP多处理提供了并行总线连接。
产品分类
产品生命周期
新设计不推荐使用本产品
表示相关产品已过时，ADI公司不再推荐新设计使用。
参考资料
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EE-112: Class Implementation in Analog C++11/14/2016
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EE-332: 周期计数与分析 (Rev. 0)8/19/2009
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• EE-332: Code example (Rev 2, 03/2008)
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EE-328: 将ADSP-2106x/2116x 的设计移植到ADSP-2126x/2136x/ 2137x SHARC®处理器系统 (Rev. 1)6/8/2009
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EE-305: 基于SHARC®处理器的系统设计与调试 (Rev. A)6/8/2009
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EE-340: SHARC®处理器和Blackfin®处理器的SPI 连接 (Rev. 1)5/11/2009
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• EE-340: Code example (Rev 1, 07/2008)
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EE-175: 仿真器与EZ-KIT Lite®评估系统问题解决指南 (Rev. 10)5/11/2009
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• EE-175: RMA forms (Rev 10, 11/2007)
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EE-68: JTAG 仿真技术参考 (Rev. 10)5/11/2009
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EE-323: Implementing Dynamically Loaded Software Modules (Rev. 1)3/8/2008
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• EE-323: Associated Code
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EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev. 1)8/31/2007
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EE-280: In-Circuit Flash Programming on ADSP-2106x SHARC® Processors (Rev. 2)4/10/2007
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• EE-280: Code Example (Rev 2, 03/2007)
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EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev. 3)3/7/2007
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EE-84: External Port DMA Modes of Operation for SHARC Processors (Rev. 2)3/2/2007
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• EE-84: Code Example (Rev 2, 2/2007)
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EE-253: Power Bypass Decoupling of SHARC® Processors (Rev. 1)12/5/2006
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EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev. 1)4/4/2005
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• EE-267 Software Code
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EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev. 1)2/15/2005
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EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev. 3)9/15/2004
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• EE-202 Software Code
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EE-241: SHARC® DSPs to TigerSHARC® Processors Code Porting Guide (Rev. 1)7/19/2004
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• EE-241 Software Code
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EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs5/21/2003
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• EE-191 Software Code
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EE-141: Benchmarking C Code on the ADSP-2106x and the ADSP-2116x Family of DSPs12/16/2002
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EE-166: ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.09/26/2002
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• EE-166 Software Code
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EE-132: Placing C Code and Data Modules in SHARC memory using VisualDSP++™9/18/2002
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• EE-132 Software Code
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EE-128: DSP in C++: Calling Assembly Class Member Functions From C++9/18/2002
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EE-116: SHARC Shortword DMA9/18/2002
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• EE-116 Software Code
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EE-109: ADSP2106x : Using 2106x SPORT's as Timers9/17/2002
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EE-86: Interfacing SHARC 2106x DSPs to PLX 9080 PCI Bridge Chips9/17/2002
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EE-85: Recommended Handling of Unused SHARC Pins9/17/2002
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EE-70: ADSP-2106x SPORT DTx pins: Is There Potential MCM Data Contention Between Different SHARCs9/17/2002
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EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev. 2)9/17/2002
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• EE-69: Code Example (Rev 2, 01/2007)
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EE-62: Accessing Short Word Memory In C9/16/2002
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EE-47: ADSP-2106x Link Ports - Maximum Throughput9/16/2002
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EE-46: SHARC Internal Power Measurements9/16/2002
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EE-45: Using the ADSP-2106x/21020 EZ-ICE DBWIN Utility9/16/2002
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EE-42: C-Programs on the ADSP-2106x9/16/2002
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EE-110: A Quick Primer on ELF and DWARF File Formats5/17/2000
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EE-104: Setting Up Streams with the VisualDSP Debugger11/5/1999
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• EE-104 Software Code
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EE-74: Analog Devices Serial Port Development and Troubleshooting Guide11/4/1999
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EE-103: Performing Level Conversion Between 5v and 3.3v IC's11/4/1999
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EE-37: How to Interface an LCD to the 21xx and 2106x Family DSP's9/21/1997
软件代码及系统需求
工具及仿真模型
IBIS模型
BSDL模型
Designing with BGA
Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages
