ADSP-21061
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ADSP-21061

50 MHz、150 MFLOPS、5v、浮点SHARC

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: 不推荐用于新设计 tooltip
: 不推荐用于新设计 tooltip
产品详情
产品模型 1
特性
  • 50MHz (20ns instruction rate) SISD SHARC Core
  • 150MFLOPs peak performance
  • Code compatible with all SHARC processors
  • Supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math
  • 1Mbit of on-chip dual-ported SRAM
  • Glueless connection for scalable DSP multiprocessing
  • Two synchronous serial ports with independent transmit and receive functions
  • 6 Channel DMA controller
  • Host Processor Interface
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The ADSP-21061 is a member of the powerful SHARC ® family of floating point processors. The SHARC ® ­Super Harvard Architecture Computer­are signal processing microcomputers that offer new capabilities and levels of integration and performance.

The ADSP-21061 is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061 combines the ADSP-21000 DSP core with a dual-ported on-chip SRAM and an I/O processor with a dedicated I/O bus to form a complete system-in-a-chip.

Fabricated in a high-speed, low-power CMOS process, the ADSP-21061 has a 20 ns instruction cycle time operating at 50 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.

The ADSP-21061 SHARC ® combines a high-performance floating-point DSP core with integrated, on-chip system features, including a 1 Mbit SRAM memory, host processor interface, DMA controller, serial ports and parallel bus connectivity for glueless DSP multiprocessing.

产品模型 1

产品技术资料帮助

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ADI公司所提供的资料均视为准确、可靠。但本公司不为用户在应用过程中侵犯任何专利权或第三方权利承担任何责任。技术指标的修改不再另行通知。本公司既没有含蓄的允许,也不允许借用ADI公司的专利或专利权的名义。本文出现的商标和注册商标所有权分别属于相应的公司。

参考资料

参考资料

产品型号 引脚/封装图-中文版 文档 CAD 符号,脚注和 3D模型
ADSP-21061KS-133
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产品型号

产品生命周期

PCN

6月 18, 2010

- 07_0093

Conversion to Laser Mark for all ADSPXXXX, ADSSTXXXX, and PC Audio Codecs Ink on Plastic Encapsulated Parts

9月 30, 2009

- 09_0184

Transfer of Assembly Site for ADSP-2106X SHARC products in the 32mm x 32mm MQFP.

6月 16, 2009

- 09_0027

Conversion to Laser Mark for the LQFP Packages (Single Grades)

3月 27, 2013

- 13_0035

Discontinuance of Select SHARC Processors in Lead(Pb) Bearing Package Options

根据型号筛选

reset

重置过滤器

产品型号

产品生命周期

PCN

6月 18, 2010

- 07_0093

arrow down

Conversion to Laser Mark for all ADSPXXXX, ADSSTXXXX, and PC Audio Codecs Ink on Plastic Encapsulated Parts

9月 30, 2009

- 09_0184

arrow down

Transfer of Assembly Site for ADSP-2106X SHARC products in the 32mm x 32mm MQFP.

6月 16, 2009

- 09_0027

arrow down

Conversion to Laser Mark for the LQFP Packages (Single Grades)

3月 27, 2013

- 13_0035

arrow down

Discontinuance of Select SHARC Processors in Lead(Pb) Bearing Package Options

软件和型号相关生态系统

软件和型号相关生态系统

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